Searched refs:PLLCTL (Results 1 – 7 of 7) sorted by relevance
905 … CLK->PLLCTL = u32CLK_SRC | ((u32MinNO - 1UL) << 14) | ((u32MinNR - 1UL) << 9) | (u32MinNF - 2UL); in CLK_EnablePLL()919 CLK->PLLCTL = CLK_PLLCTL_192MHz_HXT; in CLK_EnablePLL()923 CLK->PLLCTL = CLK_PLLCTL_192MHz_HIRC; in CLK_EnablePLL()945 CLK->PLLCTL |= CLK_PLLCTL_PD_Msk; in CLK_DisablePLL()1194 u32PllReg = CLK->PLLCTL; in CLK_GetPLLClockFreq()
1092 CLK->PLLCTL = u32CLK_SRC; in CLK_EnablePLL()1105 CLK->PLLCTL = CLK_PLLCTL_PLLSRC_HXT; in CLK_EnablePLL()1107 CLK->PLLCTL = CLK_PLLCTL_PLLSRC_HIRC; in CLK_EnablePLL()1124 CLK->PLLCTL |= CLK_PLLCTL_PD_Msk; in CLK_DisablePLL()1352 u32PllReg = CLK->PLLCTL; in CLK_GetPLLClockFreq()
1055 CLK->PLLCTL |= CLK_PLLCTL_PD_Msk; in CLK_EnablePLL()1141 CLK->PLLCTL = u32PllClkSrc | in CLK_EnablePLL()1152 CLK->PLLCTL = u32PllClkSrc | CLK_PLLCTL_192MHz_HXT; in CLK_EnablePLL()1175 CLK->PLLCTL |= CLK_PLLCTL_PD_Msk; in CLK_DisablePLL()1407 u32PllReg = CLK->PLLCTL; in CLK_GetPLLClockFreq()
1002 …__IO uint32_t PLLCTL; /*!< [0x0040] PLL Control Register … member
1503 …__IO uint32_t PLLCTL; /*!< [0x0040] PLL Control Register … member
1500 …__IO uint32_t PLLCTL; /*!< [0x0040] PLL Control Register … member
1500 …__IO uint32_t PLLCTL; /*!< [0x0040] PLL Control Register …
