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Searched refs:CTL0 (Results 1 – 25 of 56) sorted by relevance

123

/hal_nuvoton-latest/m46x/StdDriver/inc/
Dspim.h159 #define SPIM_ENABLE_CIPHER() (SPIM->CTL0 &= ~SPIM_CTL0_CIPHOFF_Msk)
165 #define SPIM_DISABLE_CIPHER() (SPIM->CTL0 |= SPIM_CTL0_CIPHOFF_Msk)
171 #define SPIM_ENABLE_BALEN() (SPIM->CTL0 |= SPIM_CTL0_BALEN_Msk)
177 #define SPIM_DISABLE_BALEN() (SPIM->CTL0 &= ~SPIM_CTL0_BALEN_Msk)
185 …SPIM->CTL0 = (SPIM->CTL0 & (~SPIM_CTL0_B4ADDREN_Msk)) | (((x) ? 1UL : 0UL) << SPIM_CTL0_B4ADDREN_P…
192 #define SPIM_ENABLE_INT() (SPIM->CTL0 |= SPIM_CTL0_IEN_Msk)
198 #define SPIM_DISABLE_INT() (SPIM->CTL0 &= ~SPIM_CTL0_IEN_Msk)
204 #define SPIM_IS_IF_ON() ((SPIM->CTL0 & SPIM_CTL0_IF_Msk) != 0UL)
212 SPIM->CTL0 = (SPIM->CTL0 & (~SPIM_CTL0_IF_Msk)) | (1UL << SPIM_CTL0_IF_Pos); \
221 … SPIM->CTL0 = (SPIM->CTL0 & (~SPIM_CTL0_DWIDTH_Msk)) | (((x) - 1U) << SPIM_CTL0_DWIDTH_Pos); \
[all …]
Decap.h91 #define ECAP_SET_NOISE_FILTER_CLKDIV(ecap, u32ClkSel) ((ecap)->CTL0 = ((ecap)->CTL0 & ~ECAP_CTL0_NF…
100 #define ECAP_NOISE_FILTER_DISABLE(ecap) ((ecap)->CTL0 |= ECAP_CTL0_CAPNFDIS_Msk)
116 #define ECAP_NOISE_FILTER_ENABLE(ecap, u32ClkSel) ((ecap)->CTL0 = ((ecap)->CTL0 & ~(ECAP_CTL0_CAPNF…
129 #define ECAP_ENABLE_INPUT_CHANNEL(ecap, u32Mask) ((ecap)->CTL0 |= (u32Mask))
142 #define ECAP_DISABLE_INPUT_CHANNEL(ecap, u32Mask) ((ecap)->CTL0 &= ~(u32Mask))
158 #define ECAP_SEL_INPUT_SRC(ecap, u32Index, u32Src) ((ecap)->CTL0 = ((ecap)->CTL0 & ~(ECAP_CTL0_CAPS…
171 #define ECAP_ENABLE_INT(ecap, u32Mask) ((ecap)->CTL0 |= (u32Mask))
184 #define ECAP_DISABLE_INT(ecap, u32Mask) ((ecap)->CTL0 &= ~(u32Mask))
193 #define ECAP_ENABLE_OVF_INT(ecap) ((ecap)->CTL0 |= ECAP_CTL0_OVIEN_Msk)
202 #define ECAP_DISABLE_OVF_INT(ecap) ((ecap)->CTL0 &= ~ECAP_CTL0_OVIEN_Msk)
[all …]
Di2s.h159 #define I2S_ENABLE_TXDMA(i2s) ( (i2s)->CTL0 |= I2S_CTL0_TXPDMAEN_Msk )
167 #define I2S_DISABLE_TXDMA(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_TXPDMAEN_Msk )
175 #define I2S_ENABLE_RXDMA(i2s) ( (i2s)->CTL0 |= I2S_CTL0_RXPDMAEN_Msk )
183 #define I2S_DISABLE_RXDMA(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_RXPDMAEN_Msk )
191 #define I2S_ENABLE_TX(i2s) ( (i2s)->CTL0 |= I2S_CTL0_TXEN_Msk )
199 #define I2S_DISABLE_TX(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_TXEN_Msk )
207 #define I2S_ENABLE_RX(i2s) ( (i2s)->CTL0 |= I2S_CTL0_RXEN_Msk )
215 #define I2S_DISABLE_RX(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_RXEN_Msk )
223 #define I2S_ENABLE_TX_MUTE(i2s) ( (i2s)->CTL0 |= I2S_CTL0_MUTE_Msk )
231 #define I2S_DISABLE_TX_MUTE(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_MUTE_Msk )
[all …]
Di2c.h83 #define I2C_SET_CONTROL_REG(i2c, u8Ctrl) ((i2c)->CTL0 = ((i2c)->CTL0 & ~0x3c) | (u8Ctrl))
95 #define I2C_START(i2c) ((i2c)->CTL0 = ((i2c)->CTL0 & ~I2C_CTL0_SI_Msk) | I2C_CTL0_STA_Msk)
107 #define I2C_WAIT_READY(i2c) while(!((i2c)->CTL0 & I2C_CTL0_SI_Msk))
454 (i2c)->CTL0 |= (I2C_CTL0_SI_Msk | I2C_CTL0_STO_Msk); in I2C_STOP()
455 while(i2c->CTL0 & I2C_CTL0_STO_Msk) in I2C_STOP()
Debi.h322 #define EBI_ENABLE_WRITE_BUFFER() (EBI->CTL0 |= EBI_CTL_WBUFEN_Msk);
334 #define EBI_DISABLE_WRITE_BUFFER() (EBI->CTL0 &= ~EBI_CTL_WBUFEN_Msk);
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dspim.h153 #define SPIM_ENABLE_CIPHER() (SPIM->CTL0 &= ~SPIM_CTL0_CIPHOFF_Msk)
159 #define SPIM_DISABLE_CIPHER() (SPIM->CTL0 |= SPIM_CTL0_CIPHOFF_Msk)
165 #define SPIM_ENABLE_BALEN() (SPIM->CTL0 |= SPIM_CTL0_BALEN_Msk)
171 #define SPIM_DISABLE_BALEN() (SPIM->CTL0 &= ~SPIM_CTL0_BALEN_Msk)
179 …SPIM->CTL0 = (SPIM->CTL0 & (~SPIM_CTL0_B4ADDREN_Msk)) | (((x) ? 1UL : 0UL) << SPIM_CTL0_B4ADDREN_P…
186 #define SPIM_ENABLE_INT() (SPIM->CTL0 |= SPIM_CTL0_IEN_Msk)
192 #define SPIM_DISABLE_INT() (SPIM->CTL0 &= ~SPIM_CTL0_IEN_Msk)
198 #define SPIM_IS_IF_ON() ((SPIM->CTL0 & SPIM_CTL0_IF_Msk) != 0UL)
206 SPIM->CTL0 = (SPIM->CTL0 & (~SPIM_CTL0_IF_Msk)) | (1UL << SPIM_CTL0_IF_Pos); \
215 … SPIM->CTL0 = (SPIM->CTL0 & (~SPIM_CTL0_DWIDTH_Msk)) | (((x) - 1U) << SPIM_CTL0_DWIDTH_Pos); \
[all …]
Decap.h91 #define ECAP_SET_NOISE_FILTER_CLKDIV(ecap, u32ClkSel) ((ecap)->CTL0 = ((ecap)->CTL0 & ~ECAP_CTL0_NF…
100 #define ECAP_NOISE_FILTER_DISABLE(ecap) ((ecap)->CTL0 |= ECAP_CTL0_CAPNFDIS_Msk)
116 #define ECAP_NOISE_FILTER_ENABLE(ecap, u32ClkSel) ((ecap)->CTL0 = ((ecap)->CTL0 & ~(ECAP_CTL0_CAPNF…
129 #define ECAP_ENABLE_INPUT_CHANNEL(ecap, u32Mask) ((ecap)->CTL0 |= (u32Mask))
142 #define ECAP_DISABLE_INPUT_CHANNEL(ecap, u32Mask) ((ecap)->CTL0 &= ~(u32Mask))
158 #define ECAP_SEL_INPUT_SRC(ecap, u32Index, u32Src) ((ecap)->CTL0 = ((ecap)->CTL0 & ~(ECAP_CTL0_CAPS…
171 #define ECAP_ENABLE_INT(ecap, u32Mask) ((ecap)->CTL0 |= (u32Mask))
184 #define ECAP_DISABLE_INT(ecap, u32Mask) ((ecap)->CTL0 &= ~(u32Mask))
193 #define ECAP_ENABLE_OVF_INT(ecap) ((ecap)->CTL0 |= ECAP_CTL0_OVIEN_Msk)
202 #define ECAP_DISABLE_OVF_INT(ecap) ((ecap)->CTL0 &= ~ECAP_CTL0_OVIEN_Msk)
[all …]
Di2s.h156 #define I2S_ENABLE_TXDMA(i2s) ( (i2s)->CTL0 |= I2S_CTL0_TXPDMAEN_Msk )
164 #define I2S_DISABLE_TXDMA(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_TXPDMAEN_Msk )
172 #define I2S_ENABLE_RXDMA(i2s) ( (i2s)->CTL0 |= I2S_CTL0_RXPDMAEN_Msk )
180 #define I2S_DISABLE_RXDMA(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_RXPDMAEN_Msk )
188 #define I2S_ENABLE_TX(i2s) ( (i2s)->CTL0 |= I2S_CTL0_TXEN_Msk )
196 #define I2S_DISABLE_TX(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_TXEN_Msk )
204 #define I2S_ENABLE_RX(i2s) ( (i2s)->CTL0 |= I2S_CTL0_RXEN_Msk )
212 #define I2S_DISABLE_RX(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_RXEN_Msk )
220 #define I2S_ENABLE_TX_MUTE(i2s) ( (i2s)->CTL0 |= I2S_CTL0_MUTE_Msk )
228 #define I2S_DISABLE_TX_MUTE(i2s) ( (i2s)->CTL0 &= ~I2S_CTL0_MUTE_Msk )
[all …]
Di2c.h73 #define I2C_SET_CONTROL_REG(i2c, u8Ctrl) ((i2c)->CTL0 = ((i2c)->CTL0 & ~0x3c) | (u8Ctrl))
85 #define I2C_START(i2c) ((i2c)->CTL0 = ((i2c)->CTL0 & ~I2C_CTL0_SI_Msk) | I2C_CTL0_STA_Msk)
97 #define I2C_WAIT_READY(i2c) while(!((i2c)->CTL0 & I2C_CTL0_SI_Msk))
443 (i2c)->CTL0 |= (I2C_CTL0_SI_Msk | I2C_CTL0_STO_Msk); in I2C_STOP()
444 while(i2c->CTL0 & I2C_CTL0_STO_Msk) in I2C_STOP()
Debi.h322 #define EBI_ENABLE_WRITE_BUFFER() (EBI->CTL0 |= EBI_CTL_WBUFEN_Msk);
334 #define EBI_DISABLE_WRITE_BUFFER() (EBI->CTL0 &= ~EBI_CTL_WBUFEN_Msk);
/hal_nuvoton-latest/m2l31x/StdDriver/inc/
Decap.h92 #define ECAP_SET_NOISE_FILTER_CLKDIV(ecap, u32ClkSel) ((ecap)->CTL0 = ((ecap)->CTL0 & ~ECAP_CTL0_NF…
101 #define ECAP_NOISE_FILTER_DISABLE(ecap) ((ecap)->CTL0 |= ECAP_CTL0_CAPNFDIS_Msk)
117 #define ECAP_NOISE_FILTER_ENABLE(ecap, u32ClkSel) ((ecap)->CTL0 = ((ecap)->CTL0 & ~(ECAP_CTL0_CAPNF…
130 #define ECAP_ENABLE_INPUT_CHANNEL(ecap, u32Mask) ((ecap)->CTL0 |= (u32Mask))
143 #define ECAP_DISABLE_INPUT_CHANNEL(ecap, u32Mask) ((ecap)->CTL0 &= ~(u32Mask))
160 #define ECAP_SEL_INPUT_SRC(ecap, u32Index, u32Src) ((ecap)->CTL0 = ((ecap)->CTL0 & ~(ECAP_CTL0_CAPS…
173 #define ECAP_ENABLE_INT(ecap, u32Mask) ((ecap)->CTL0 |= (u32Mask))
186 #define ECAP_DISABLE_INT(ecap, u32Mask) ((ecap)->CTL0 &= ~(u32Mask))
195 #define ECAP_ENABLE_OVF_INT(ecap) ((ecap)->CTL0 |= ECAP_CTL0_OVIEN_Msk)
204 #define ECAP_DISABLE_OVF_INT(ecap) ((ecap)->CTL0 &= ~ECAP_CTL0_OVIEN_Msk)
[all …]
Dlpi2c.h90 #define LPI2C_SET_CONTROL_REG(lpi2c, u8Ctrl) ((lpi2c)->CTL0 = ((lpi2c)->CTL0 & ~0x3C) | (u8Ctrl))
102 #define LPI2C_START(lpi2c) ((lpi2c)->CTL0 = ((lpi2c)->CTL0 | LPI2C_CTL0_SI_Msk) | LPI2C_CTL0_STA_M…
114 #define LPI2C_WAIT_READY(lpi2c) while(!((lpi2c)->CTL0 & LPI2C_CTL0_SI_Msk))
389 (lpi2c)->CTL0 |= (LPI2C_CTL0_SI_Msk | LPI2C_CTL0_STO_Msk); in LPI2C_STOP()
390 while(lpi2c->CTL0 & LPI2C_CTL0_STO_Msk) in LPI2C_STOP()
Di2c.h84 #define I2C_SET_CONTROL_REG(i2c, u8Ctrl) ((i2c)->CTL0 = ((i2c)->CTL0 & ~0x3C) | (u8Ctrl))
96 #define I2C_START(i2c) ((i2c)->CTL0 = ((i2c)->CTL0 | I2C_CTL0_SI_Msk) | I2C_CTL0_STA_Msk)
108 #define I2C_WAIT_READY(i2c) while(!((i2c)->CTL0 & I2C_CTL0_SI_Msk))
493 (i2c)->CTL0 |= (I2C_CTL0_SI_Msk | I2C_CTL0_STO_Msk); in I2C_STOP()
494 while(i2c->CTL0 & I2C_CTL0_STO_Msk) in I2C_STOP()
Debi.h311 #define EBI_ENABLE_WRITE_BUFFER() (EBI->CTL0 |= EBI_CTL_WBUFEN_Msk);
322 #define EBI_DISABLE_WRITE_BUFFER() (EBI->CTL0 &= ~EBI_CTL_WBUFEN_Msk);
/hal_nuvoton-latest/m2l31x/StdDriver/src/
Decap.c36 ecap->CTL0 = ecap->CTL0 & ~(ECAP_CTL0_CMPEN_Msk); in ECAP_Open()
39 ecap->CTL0 |= ECAP_CTL0_CAPEN_Msk | (u32FuncMask); in ECAP_Open()
52 ecap->CTL0 &= ~ECAP_CTL0_CAPEN_Msk; in ECAP_Close()
70 ecap->CTL0 |= (u32Mask); in ECAP_EnableINT()
98 ecap->CTL0 &= ~(u32Mask); in ECAP_DisableINT()
Debi.c57 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + (uint32_t)u32Bank * 0x10U; in EBI_Open()
149 uint32_t u32Index = (uint32_t)&EBI->CTL0 + u32Bank * 0x10U; in EBI_Close()
179 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + (uint32_t)u32Bank * 0x10U; in EBI_SetBusTiming()
Di2c.c56 i2c->CTL0 |= I2C_CTL0_I2CEN_Msk; in I2C_Open()
97 i2c->CTL0 &= ~I2C_CTL0_I2CEN_Msk; in I2C_Close()
153 i2c->CTL0 = (i2c->CTL0 & ~0x3CU) | u32Reg; in I2C_Trigger()
168 i2c->CTL0 &= ~I2C_CTL0_INTEN_Msk; in I2C_DisableInt()
183 i2c->CTL0 |= I2C_CTL0_INTEN_Msk; in I2C_EnableInt()
255 if((i2c->CTL0 & I2C_CTL0_SI_Msk) == I2C_CTL0_SI_Msk) in I2C_GetIntFlag()
464 … i2c->CTL0 = (i2c->CTL0 & ~0xC33C) | (I2C_CTL0_SRCINTEN_Msk | I2C_CTL0_DPCINTEN_Msk | u32BitCount); in I2C_EnableTwoBufferMode()
483 …i2c->CTL0 = (i2c->CTL0 & ~0xC03C) & ~(I2C_CTL0_SRCINTEN_Msk | I2C_CTL0_DPCINTEN_Msk | I2C_CTL0_DPB… in I2C_DisableTwoBufferMode()
Dlpi2c.c49 lpi2c->CTL0 |= LPI2C_CTL0_LPI2CEN_Msk; in LPI2C_Open()
72 lpi2c->CTL0 &= ~LPI2C_CTL0_LPI2CEN_Msk; in LPI2C_Close()
128 lpi2c->CTL0 = (lpi2c->CTL0 & ~0x3CU) | u32Reg; in LPI2C_Trigger()
143 lpi2c->CTL0 &= ~LPI2C_CTL0_INTEN_Msk; in LPI2C_DisableInt()
158 lpi2c->CTL0 |= LPI2C_CTL0_INTEN_Msk; in LPI2C_EnableInt()
216 if((lpi2c->CTL0 & LPI2C_CTL0_SI_Msk) == LPI2C_CTL0_SI_Msk) in LPI2C_GetIntFlag()
/hal_nuvoton-latest/m48x/StdDriver/src/
Decap.c36 ecap->CTL0 = ecap->CTL0 & ~(ECAP_CTL0_CMPEN_Msk); in ECAP_Open()
39 ecap->CTL0 |= ECAP_CTL0_CAPEN_Msk | (u32FuncMask); in ECAP_Open()
53 ecap->CTL0 &= ~ECAP_CTL0_CAPEN_Msk; in ECAP_Close()
71 ecap->CTL0 |= (u32Mask); in ECAP_EnableINT()
99 ecap->CTL0 &= ~(u32Mask); in ECAP_DisableINT()
Di2s.c99 i2s->CTL0 = u32MasterSlave | u32WordWidth | u32MonoData | u32DataFormat; in I2S_Open()
113 i2s->CTL0 |= I2S_CTL0_I2SEN_Msk; in I2S_Open()
125 i2s->CTL0 &= ~I2S_CTL0_I2SEN_Msk; in I2S_Close()
175 i2s->CTL0 |= I2S_CTL0_MCLKEN_Msk; in I2S_EnableMCLK()
198 i2s->CTL0 &= ~I2S_CTL0_MCLKEN_Msk; in I2S_DisableMCLK()
238 …i2s->CTL0 = ((i2s->CTL0 & ~(I2S_CTL0_TDMCHNUM_Msk | I2S_CTL0_CHWIDTH_Msk | I2S_CTL0_PCMSYNC_Msk)) | in I2S_ConfigureTDM()
Debi.c58 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + (uint32_t)u32Bank * 0x10U; in EBI_Open()
150 uint32_t u32Index = (uint32_t)&EBI->CTL0 + u32Bank * 0x10U; in EBI_Close()
180 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + (uint32_t)u32Bank * 0x10U; in EBI_SetBusTiming()
Di2c.c55 i2c->CTL0 |= I2C_CTL0_I2CEN_Msk; in I2C_Open()
86 i2c->CTL0 &= ~I2C_CTL0_I2CEN_Msk; in I2C_Close()
142 i2c->CTL0 = (i2c->CTL0 & ~0x3CU) | u32Reg; in I2C_Trigger()
157 i2c->CTL0 &= ~I2C_CTL0_INTEN_Msk; in I2C_DisableInt()
172 i2c->CTL0 |= I2C_CTL0_INTEN_Msk; in I2C_EnableInt()
244 if((i2c->CTL0 & I2C_CTL0_SI_Msk) == I2C_CTL0_SI_Msk) in I2C_GetIntFlag()
/hal_nuvoton-latest/m46x/StdDriver/src/
Decap.c36 ecap->CTL0 = ecap->CTL0 & ~(ECAP_CTL0_CMPEN_Msk); in ECAP_Open()
39 ecap->CTL0 |= ECAP_CTL0_CAPEN_Msk | (u32FuncMask); in ECAP_Open()
53 ecap->CTL0 &= ~ECAP_CTL0_CAPEN_Msk; in ECAP_Close()
71 ecap->CTL0 |= (u32Mask); in ECAP_EnableINT()
107 ecap->CTL0 &= ~(u32Mask); in ECAP_DisableINT()
Di2s.c154 i2s->CTL0 = u32MasterSlave | u32WordWidth | u32MonoData | u32DataFormat; in I2S_Open()
167 i2s->CTL0 |= I2S_CTL0_I2SEN_Msk; in I2S_Open()
179 i2s->CTL0 &= ~I2S_CTL0_I2SEN_Msk; in I2S_Close()
229 i2s->CTL0 |= I2S_CTL0_MCLKEN_Msk; in I2S_EnableMCLK()
252 i2s->CTL0 &= ~I2S_CTL0_MCLKEN_Msk; in I2S_DisableMCLK()
291 … i2s->CTL0 = (i2s->CTL0 & ~(I2S_CTL0_TDMCHNUM_Msk | I2S_CTL0_CHWIDTH_Msk | I2S_CTL0_PCMSYNC_Msk)) | in I2S_ConfigureTDM()
Debi.c58 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + ((uint32_t)u32Bank * 0x10UL); in EBI_Open()
150 uint32_t u32Index = (uint32_t)&EBI->CTL0 + (u32Bank * 0x10UL); in EBI_Close()
180 uint32_t u32Index0 = (uint32_t)&EBI->CTL0 + (u32Bank * 0x10UL); in EBI_SetBusTiming()

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