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Searched refs:CLK_PLLCTL_PLLSRC_Pos (Results 1 – 5 of 5) sorted by relevance

/hal_nuvoton-latest/m48x/Devices/M480/Include/
Dclk_reg.h1464 #define CLK_PLLCTL_PLLSRC_Pos (19) /*!< CLK… macro
1465 #define CLK_PLLCTL_PLLSRC_Msk (0x1ul << CLK_PLLCTL_PLLSRC_Pos) /*!< CLK…
/hal_nuvoton-latest/m2l31x/Devices/M2L31/Include/
Dclk_reg.h1894 #define CLK_PLLCTL_PLLSRC_Pos (19) /*!< CLK… macro
1895 #define CLK_PLLCTL_PLLSRC_Msk (0x1ul << CLK_PLLCTL_PLLSRC_Pos) /*!< CLK…
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dclk_reg.h2104 #define CLK_PLLCTL_PLLSRC_Pos (19) /*!< CLK… macro
2105 #define CLK_PLLCTL_PLLSRC_Msk (0x1ul << CLK_PLLCTL_PLLSRC_Pos) /*!< CLK…
/hal_nuvoton-latest/dts/m46x/
Dclk_reg.h2108 #define CLK_PLLCTL_PLLSRC_Pos (19) /*!< CLK… macro
2109 #define CLK_PLLCTL_PLLSRC_Msk (0x1ul << CLK_PLLCTL_PLLSRC_Pos) /*!< CLK…
/hal_nuvoton-latest/m2l31x/StdDriver/inc/
Dclk.h337 #define CLK_PLLCTL_PLLSRC_HXT (0x0UL << CLK_PLLCTL_PLLSRC_Pos) /*!< For PLL clock source is HX…
338 #define CLK_PLLCTL_PLLSRC_HIRC (0x1UL << CLK_PLLCTL_PLLSRC_Pos) /*!< For PLL clock source is HI…