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Searched refs:CLK_PLLCTL_NO_1 (Results 1 – 4 of 4) sorted by relevance

/hal_nuvoton-latest/m46x/StdDriver/inc/
Dclk.h440 #define CLK_PLLCTL_NO_1 0x0000UL /*!< For output divider is 1 \hideinitializer */ macro
450 …CLK_PLLCTL_PLLSRC_HXT | CLK_PLLCTL_NR(3UL) | CLK_PLLCTL_NF( 25UL) | CLK_PLLCTL_NO_1) /*!< Predefi…
458 …CLK_PLLCTL_PLLSRC_HIRC | CLK_PLLCTL_NR(3UL) | CLK_PLLCTL_NF( 25UL) | CLK_PLLCTL_NO_1) /*!< Predefi…
459 …CLK_PLLCTL_PLLSRC_HIRC | CLK_PLLCTL_NR(2UL) | CLK_PLLCTL_NF( 48UL) | CLK_PLLCTL_NO_1) /*!< Predefi…
/hal_nuvoton-latest/dts/m46x/
Dclk.h441 #define CLK_PLLCTL_NO_1 0x0000UL /*!< For output divider is 1 \hideinitializer */ macro
451 …CLK_PLLCTL_PLLSRC_HXT | CLK_PLLCTL_NR(3UL) | CLK_PLLCTL_NF( 25UL) | CLK_PLLCTL_NO_1) /*!< Predefi…
459 …CLK_PLLCTL_PLLSRC_HIRC | CLK_PLLCTL_NR(3UL) | CLK_PLLCTL_NF( 25UL) | CLK_PLLCTL_NO_1) /*!< Predefi…
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dclk.h320 #define CLK_PLLCTL_NO_1 0x0000UL /*!< For output divider is 1 \hideinitializer */ macro
/hal_nuvoton-latest/m2l31x/StdDriver/inc/
Dclk.h343 #define CLK_PLLCTL_NO_1 (0x0UL << CLK_PLLCTL2_OUTDIV_Pos) /*!< For output divider is 1 \h… macro