Searched refs:CLK_CLKSEL0_SDH0SEL_PLL_DIV2 (Results 1 – 3 of 3) sorted by relevance
384 else if(u32SD_ClkSrc == CLK_CLKSEL0_SDH0SEL_PLL_DIV2) in SDH_Set_clock()
83 #define CLK_CLKSEL0_SDH0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH… macro
