CLK_CLKSEL3_UART4SEL_Pos (reference) in projects: hal_nuvoton-3.7.0

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Searched refs:CLK_CLKSEL3_UART4SEL_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_nuvoton-3.7.0/m48x/StdDriver/src/
D	uart.c	`230 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos; in UART_Open() 386 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos; in UART_SetLineConfig() 501 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos; in UART_SelectIrDAMode()`
/hal_nuvoton-3.7.0/m46x/StdDriver/src/
D	uart.c	`225 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos; in UART_Open() 383 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos; in UART_SetLineConfig() 498 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos; in UART_SelectIrDAMode()`
/hal_nuvoton-3.7.0/m48x/StdDriver/inc/
D	clk.h	`225 #define CLK_CLKSEL3_UART4SEL_HXT (0x0UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 226 #define CLK_CLKSEL3_UART4SEL_LXT (0x2UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 227 #define CLK_CLKSEL3_UART4SEL_PLL (0x1UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 228 #define CLK_CLKSEL3_UART4SEL_HIRC (0x3UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR…`
/hal_nuvoton-3.7.0/m48x/Devices/M480/Include/
D	clk_reg.h	`1371 #define CLK_CLKSEL3_UART4SEL_Pos (28) /!< CLK… macro 1372 #define CLK_CLKSEL3_UART4SEL_Msk (0x3ul << CLK_CLKSEL3_UART4SEL_Pos) /!< CLK…`
/hal_nuvoton-3.7.0/m46x/Devices/M460/Include/
D	clk_reg.h	`1954 #define CLK_CLKSEL3_UART4SEL_Pos (28) /!< CLK… macro 1955 #define CLK_CLKSEL3_UART4SEL_Msk (0x3ul << CLK_CLKSEL3_UART4SEL_Pos) /!< CLK…`
/hal_nuvoton-3.7.0/dts/m46x/
D	clk_reg.h	`1955 #define CLK_CLKSEL3_UART4SEL_Pos (28) /!< CLK… macro 1956 #define CLK_CLKSEL3_UART4SEL_Msk (0x3ul << CLK_CLKSEL3_UART4SEL_Pos) /!< CLK…`
D	clk.h	`299 #define CLK_CLKSEL3_UART4SEL_HXT (0x0UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 300 #define CLK_CLKSEL3_UART4SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 301 #define CLK_CLKSEL3_UART4SEL_LXT (0x2UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 302 #define CLK_CLKSEL3_UART4SEL_HIRC (0x3UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR…`
/hal_nuvoton-3.7.0/m46x/StdDriver/inc/
D	clk.h	`299 #define CLK_CLKSEL3_UART4SEL_HXT (0x0UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 300 #define CLK_CLKSEL3_UART4SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 301 #define CLK_CLKSEL3_UART4SEL_LXT (0x2UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR… 302 #define CLK_CLKSEL3_UART4SEL_HIRC (0x3UL << CLK_CLKSEL3_UART4SEL_Pos) /!< Select UAR…`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
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Zephyr-Core-3.5.0
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babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
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