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Searched refs:CLK_CLKSEL2_SPI0SEL_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_nuvoton-3.7.0/m2l31x/StdDriver/inc/
Dclk.h177 #define CLK_CLKSEL2_SPI0SEL_HXT (0x0UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
178 #define CLK_CLKSEL2_SPI0SEL_PLL (0x1UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
179 #define CLK_CLKSEL2_SPI0SEL_PCLK1 (0x2UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
180 #define CLK_CLKSEL2_SPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
181 #define CLK_CLKSEL2_SPI0SEL_HIRC48M (0x4UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
/hal_nuvoton-3.7.0/m48x/StdDriver/inc/
Dclk.h151 #define CLK_CLKSEL2_SPI0SEL_HXT (0x0UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
152 #define CLK_CLKSEL2_SPI0SEL_PLL (0x1UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
153 #define CLK_CLKSEL2_SPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
154 #define CLK_CLKSEL2_SPI0SEL_PCLK1 (0x2UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
/hal_nuvoton-3.7.0/dts/m46x/
Dclk.h184 #define CLK_CLKSEL2_SPI0SEL_HXT (0x0UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
185 #define CLK_CLKSEL2_SPI0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
186 #define CLK_CLKSEL2_SPI0SEL_PCLK1 (0x2UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
187 #define CLK_CLKSEL2_SPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
188 #define CLK_CLKSEL2_SPI0SEL_HIRC48M (0x4UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
189 #define CLK_CLKSEL2_SPI0SEL_PLLFN_DIV2 (0x5UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
Dclk_reg.h1892 #define CLK_CLKSEL2_SPI0SEL_Pos (4) /*!< CLK… macro
1893 #define CLK_CLKSEL2_SPI0SEL_Msk (0x7ul << CLK_CLKSEL2_SPI0SEL_Pos) /*!< CLK…
/hal_nuvoton-3.7.0/m46x/StdDriver/inc/
Dclk.h184 #define CLK_CLKSEL2_SPI0SEL_HXT (0x0UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
185 #define CLK_CLKSEL2_SPI0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
186 #define CLK_CLKSEL2_SPI0SEL_PCLK1 (0x2UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
187 #define CLK_CLKSEL2_SPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
188 #define CLK_CLKSEL2_SPI0SEL_HIRC48M (0x4UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
189 #define CLK_CLKSEL2_SPI0SEL_PLLFN_DIV2 (0x5UL << CLK_CLKSEL2_SPI0SEL_Pos) /*!< Select SPI…
/hal_nuvoton-3.7.0/m48x/Devices/M480/Include/
Dclk_reg.h1323 #define CLK_CLKSEL2_SPI0SEL_Pos (4) /*!< CLK… macro
1324 #define CLK_CLKSEL2_SPI0SEL_Msk (0x3ul << CLK_CLKSEL2_SPI0SEL_Pos) /*!< CLK…
/hal_nuvoton-3.7.0/m2l31x/Devices/M2L31/Include/
Dclk_reg.h1807 #define CLK_CLKSEL2_SPI0SEL_Pos (4) /*!< CLK… macro
1808 #define CLK_CLKSEL2_SPI0SEL_Msk (0x7ul << CLK_CLKSEL2_SPI0SEL_Pos) /*!< CLK…
/hal_nuvoton-3.7.0/m46x/Devices/M460/Include/
Dclk_reg.h1891 #define CLK_CLKSEL2_SPI0SEL_Pos (4) /*!< CLK… macro
1892 #define CLK_CLKSEL2_SPI0SEL_Msk (0x7ul << CLK_CLKSEL2_SPI0SEL_Pos) /*!< CLK…