Searched refs:CLK_CLKSEL0_EADC0SEL_Pos (Results 1 – 6 of 6) sorted by relevance
98 #define CLK_CLKSEL0_EADC0SEL_PLL (0x1UL << CLK_CLKSEL0_EADC0SEL_Pos) /*!< Select EAD…99 #define CLK_CLKSEL0_EADC0SEL_HCLK (0x2UL << CLK_CLKSEL0_EADC0SEL_Pos) /*!< Select EAD…100 #define CLK_CLKSEL0_EADC0SEL_HCLK0 (0x2UL << CLK_CLKSEL0_EADC0SEL_Pos) /*!< Select EAD…101 #define CLK_CLKSEL0_EADC0SEL_HIRC (0x3UL << CLK_CLKSEL0_EADC0SEL_Pos) /*!< Select EAD…
1768 #define CLK_CLKSEL0_EADC0SEL_Pos (10) /*!< CLK… macro1769 #define CLK_CLKSEL0_EADC0SEL_Msk (0x3ul << CLK_CLKSEL0_EADC0SEL_Pos) /*!< CLK…
1825 #define CLK_CLKSEL0_EADC0SEL_Pos (10) /*!< CLK… macro1826 #define CLK_CLKSEL0_EADC0SEL_Msk (0x3ul << CLK_CLKSEL0_EADC0SEL_Pos) /*!< CLK…
1826 #define CLK_CLKSEL0_EADC0SEL_Pos (10) /*!< CLK… macro1827 #define CLK_CLKSEL0_EADC0SEL_Msk (0x3ul << CLK_CLKSEL0_EADC0SEL_Pos) /*!< CLK…
65 #define CLK_CLKSEL0_EADC0SEL_PLLFN_DIV2 (0x0UL << CLK_CLKSEL0_EADC0SEL_Pos) /*!< Select EAD…66 #define CLK_CLKSEL0_EADC0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL0_EADC0SEL_Pos) /*!< Select EAD…67 #define CLK_CLKSEL0_EADC0SEL_HCLK (0x2UL << CLK_CLKSEL0_EADC0SEL_Pos) /*!< Select EAD…
