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Searched refs:CLKSEL4 (Results 1 – 5 of 5) sorted by relevance

/hal_nuvoton-3.7.0/m46x/StdDriver/src/
Dspi.c92 … CLK->CLKSEL4 = (CLK->CLKSEL4 & (~CLK_CLKSEL4_SPI4SEL_Msk)) | CLK_CLKSEL4_SPI4SEL_PCLK1; in SPI_Open()
96 … CLK->CLKSEL4 = (CLK->CLKSEL4 & (~CLK_CLKSEL4_SPI5SEL_Msk)) | CLK_CLKSEL4_SPI5SEL_PCLK0; in SPI_Open()
100 … CLK->CLKSEL4 = (CLK->CLKSEL4 & (~CLK_CLKSEL4_SPI6SEL_Msk)) | CLK_CLKSEL4_SPI6SEL_PCLK1; in SPI_Open()
104 … CLK->CLKSEL4 = (CLK->CLKSEL4 & (~CLK_CLKSEL4_SPI7SEL_Msk)) | CLK_CLKSEL4_SPI7SEL_PCLK0; in SPI_Open()
108 … CLK->CLKSEL4 = (CLK->CLKSEL4 & (~CLK_CLKSEL4_SPI8SEL_Msk)) | CLK_CLKSEL4_SPI8SEL_PCLK1; in SPI_Open()
112 … CLK->CLKSEL4 = (CLK->CLKSEL4 & (~CLK_CLKSEL4_SPI9SEL_Msk)) | CLK_CLKSEL4_SPI9SEL_PCLK0; in SPI_Open()
116 … CLK->CLKSEL4 = (CLK->CLKSEL4 & (~CLK_CLKSEL4_SPI10SEL_Msk)) | CLK_CLKSEL4_SPI10SEL_PCLK1; in SPI_Open()
231 if((CLK->CLKSEL4 & CLK_CLKSEL4_SPI4SEL_Msk) == CLK_CLKSEL4_SPI4SEL_HXT) in SPI_Open()
235 else if((CLK->CLKSEL4 & CLK_CLKSEL4_SPI4SEL_Msk) == CLK_CLKSEL4_SPI4SEL_PLL_DIV2) in SPI_Open()
239 else if((CLK->CLKSEL4 & CLK_CLKSEL4_SPI4SEL_Msk) == CLK_CLKSEL4_SPI4SEL_PCLK1) in SPI_Open()
[all …]
/hal_nuvoton-3.7.0/m2l31x/StdDriver/src/
Duart.c211 …u32UartClkSrcSel = ((uint32_t)(CLK->CLKSEL4 & CLK_CLKSEL4_UART0SEL_Msk)) >> CLK_CLKSEL4_UART0SEL_P… in UART_Open()
218 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART1SEL_Msk) >> CLK_CLKSEL4_UART1SEL_Pos; in UART_Open()
225 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART2SEL_Msk) >> CLK_CLKSEL4_UART2SEL_Pos; in UART_Open()
232 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART3SEL_Msk) >> CLK_CLKSEL4_UART3SEL_Pos; in UART_Open()
239 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART4SEL_Msk) >> CLK_CLKSEL4_UART4SEL_Pos; in UART_Open()
246 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART5SEL_Msk) >> CLK_CLKSEL4_UART5SEL_Pos; in UART_Open()
253 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART6SEL_Msk) >> CLK_CLKSEL4_UART6SEL_Pos; in UART_Open()
260 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART7SEL_Msk) >> CLK_CLKSEL4_UART7SEL_Pos; in UART_Open()
381 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART0SEL_Msk) >> CLK_CLKSEL4_UART0SEL_Pos; in UART_SetLine_Config()
388 u32UartClkSrcSel = (CLK->CLKSEL4 & CLK_CLKSEL4_UART1SEL_Msk) >> CLK_CLKSEL4_UART1SEL_Pos; in UART_SetLine_Config()
[all …]
/hal_nuvoton-3.7.0/m2l31x/Devices/M2L31/Include/
Dclk_reg.h1505 …__IO uint32_t CLKSEL4; /*!< [0x0048] Clock Source Select Control Register 4 … member
/hal_nuvoton-3.7.0/m46x/Devices/M460/Include/
Dclk_reg.h1507 …__IO uint32_t CLKSEL4; /*!< [0x005c] Clock Source Select Control Register 4 … member
/hal_nuvoton-3.7.0/dts/m46x/
Dclk_reg.h1507 …__IO uint32_t CLKSEL4; /*!< [0x005c] Clock Source Select Control Register 4 …