Home
last modified time | relevance | path

Searched refs:CLKSEL2 (Results 1 – 19 of 19) sorted by relevance

/hal_nuvoton-3.7.0/m48x/StdDriver/src/
Dspi.c76 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI0SEL_Msk)) | CLK_CLKSEL2_SPI0SEL_PCLK1; in SPI_Open()
80 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI1SEL_Msk)) | CLK_CLKSEL2_SPI1SEL_PCLK0; in SPI_Open()
84 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI2SEL_Msk)) | CLK_CLKSEL2_SPI2SEL_PCLK1; in SPI_Open()
88 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI3SEL_Msk)) | CLK_CLKSEL2_SPI3SEL_PCLK0; in SPI_Open()
95 if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_HXT) in SPI_Open()
99 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_PLL) in SPI_Open()
103 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_PCLK1) in SPI_Open()
115 if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_HXT) in SPI_Open()
119 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_PLL) in SPI_Open()
123 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_PCLK0) in SPI_Open()
[all …]
Dqspi.c71 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_Open()
79 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_HXT) in QSPI_Open()
83 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PLL) in QSPI_Open()
87 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PCLK0) in QSPI_Open()
171 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_Open()
279 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_SetBusClock()
287 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_HXT) in QSPI_SetBusClock()
291 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PLL) in QSPI_SetBusClock()
295 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PCLK0) in QSPI_SetBusClock()
400 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_HXT) in QSPI_GetBusClock()
[all …]
Dbpwm.c44 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk; in BPWM_ConfigCaptureChannel()
48 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk; in BPWM_ConfigCaptureChannel()
139 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk; in BPWM_ConfigOutputChannel()
143 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk; in BPWM_ConfigOutputChannel()
Dclk.c1281 return ((CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk) >> CLK_CLKSEL2_EPWM0SEL_Pos); in CLK_GetModuleClockSource()
1283 return ((CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk) >> CLK_CLKSEL2_EPWM1SEL_Pos); in CLK_GetModuleClockSource()
1285 return ((CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk) >> CLK_CLKSEL2_BPWM0SEL_Pos); in CLK_GetModuleClockSource()
1287 return ((CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk) >> CLK_CLKSEL2_BPWM1SEL_Pos); in CLK_GetModuleClockSource()
Depwm.c46 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in EPWM_ConfigCaptureChannel()
50 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in EPWM_ConfigCaptureChannel()
144 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in EPWM_ConfigOutputChannel()
148 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in EPWM_ConfigOutputChannel()
/hal_nuvoton-3.7.0/m2l31x/StdDriver/src/
Dspi.c75 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI0SEL_Msk)) | CLK_CLKSEL2_SPI0SEL_PCLK1; in SPI_Open()
79 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI1SEL_Msk)) | CLK_CLKSEL2_SPI1SEL_PCLK0; in SPI_Open()
83 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL3_SPI2SEL_Msk)) | CLK_CLKSEL3_SPI2SEL_PCLK1; in SPI_Open()
87 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL3_SPI3SEL_Msk)) | CLK_CLKSEL3_SPI3SEL_PCLK0; in SPI_Open()
94 if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_HXT) in SPI_Open()
98 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_PLL) in SPI_Open()
102 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_PCLK1) in SPI_Open()
114 if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_HXT) in SPI_Open()
118 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_PLL) in SPI_Open()
122 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_PCLK0) in SPI_Open()
[all …]
Dqspi.c70 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_Open()
74 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_HXT) in QSPI_Open()
78 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PLL) in QSPI_Open()
82 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PCLK0) in QSPI_Open()
142 CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_Open()
234 CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_SetBusClock()
238 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_HXT) in QSPI_SetBusClock()
242 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PLL) in QSPI_SetBusClock()
246 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PCLK0) in QSPI_SetBusClock()
327 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_HXT) in QSPI_GetBusClock()
[all …]
Depwm.c44 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in EPWM_ConfigCaptureChannel()
48 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in EPWM_ConfigCaptureChannel()
142 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in EPWM_ConfigOutputChannel()
146 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in EPWM_ConfigOutputChannel()
/hal_nuvoton-3.7.0/m46x/StdDriver/src/
Dqspi.c71 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_Open()
73 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI1SEL_Msk)) | CLK_CLKSEL2_QSPI1SEL_PCLK1; in QSPI_Open()
79 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_HXT) in QSPI_Open()
83 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PLL_DIV2) in QSPI_Open()
87 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI0SEL_Msk) == CLK_CLKSEL2_QSPI0SEL_PCLK0) in QSPI_Open()
98 if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI1SEL_Msk) == CLK_CLKSEL2_QSPI1SEL_HXT) in QSPI_Open()
102 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI1SEL_Msk) == CLK_CLKSEL2_QSPI1SEL_PLL_DIV2) in QSPI_Open()
106 else if((CLK->CLKSEL2 & CLK_CLKSEL2_QSPI1SEL_Msk) == CLK_CLKSEL2_QSPI1SEL_PCLK1) in QSPI_Open()
169 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI0SEL_Msk)) | CLK_CLKSEL2_QSPI0SEL_PCLK0; in QSPI_Open()
175 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_QSPI1SEL_Msk)) | CLK_CLKSEL2_QSPI1SEL_PCLK1; in QSPI_Open()
[all …]
Dspi.c76 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI0SEL_Msk)) | CLK_CLKSEL2_SPI0SEL_PCLK1; in SPI_Open()
80 … CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_SPI1SEL_Msk)) | CLK_CLKSEL2_SPI1SEL_PCLK0; in SPI_Open()
123 if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_HXT) in SPI_Open()
127 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_PLL_DIV2) in SPI_Open()
131 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_PCLK1) in SPI_Open()
135 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_HIRC) in SPI_Open()
139 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI0SEL_Msk) == CLK_CLKSEL2_SPI0SEL_HIRC48M) in SPI_Open()
150 if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_HXT) in SPI_Open()
154 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_PLL_DIV2) in SPI_Open()
158 else if((CLK->CLKSEL2 & CLK_CLKSEL2_SPI1SEL_Msk) == CLK_CLKSEL2_SPI1SEL_PCLK0) in SPI_Open()
[all …]
Duart.c241 … u32UartClkSrcSel = (CLK->CLKSEL2 & CLK_CLKSEL2_UART8SEL_Msk) >> CLK_CLKSEL2_UART8SEL_Pos; in UART_Open()
245 … u32UartClkSrcSel = (CLK->CLKSEL2 & CLK_CLKSEL2_UART9SEL_Msk) >> CLK_CLKSEL2_UART9SEL_Pos; in UART_Open()
399 … u32UartClkSrcSel = (CLK->CLKSEL2 & CLK_CLKSEL2_UART8SEL_Msk) >> CLK_CLKSEL2_UART8SEL_Pos; in UART_SetLineConfig()
403 … u32UartClkSrcSel = (CLK->CLKSEL2 & CLK_CLKSEL2_UART9SEL_Msk) >> CLK_CLKSEL2_UART9SEL_Pos; in UART_SetLineConfig()
514 … u32UartClkSrcSel = (CLK->CLKSEL2 & CLK_CLKSEL2_UART8SEL_Msk) >> CLK_CLKSEL2_UART8SEL_Pos; in UART_SelectIrDAMode()
518 … u32UartClkSrcSel = (CLK->CLKSEL2 & CLK_CLKSEL2_UART9SEL_Msk) >> CLK_CLKSEL2_UART9SEL_Pos; in UART_SelectIrDAMode()
Dbpwm.c47 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk; in BPWM_ConfigCaptureChannel()
51 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk; in BPWM_ConfigCaptureChannel()
143 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM0SEL_Msk; in BPWM_ConfigOutputChannel()
147 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_BPWM1SEL_Msk; in BPWM_ConfigOutputChannel()
Drng.c64 CLK->CLKSEL2 = (CLK->CLKSEL2 & (~CLK_CLKSEL2_TRNGSEL_Msk)) | CLK_CLKSEL2_TRNGSEL_LIRC; in RNG_BasicConfig()
Depwm.c45 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in EPWM_ConfigCaptureChannel()
49 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in EPWM_ConfigCaptureChannel()
140 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM0SEL_Msk; in EPWM_ConfigOutputChannel()
144 u32Src = CLK->CLKSEL2 & CLK_CLKSEL2_EPWM1SEL_Msk; in EPWM_ConfigOutputChannel()
Di2s.c75 u32ClkSrcSel = CLK->CLKSEL2 & CLK_CLKSEL2_I2S1SEL_Msk; in I2S_GetSourceClockFreq()
/hal_nuvoton-3.7.0/m48x/Devices/M480/Include/
Dclk_reg.h991 …__IO uint32_t CLKSEL2; /*!< [0x0018] Clock Source Select Control Register 2 … member
/hal_nuvoton-3.7.0/m2l31x/Devices/M2L31/Include/
Dclk_reg.h1495 …__IO uint32_t CLKSEL2; /*!< [0x0018] Clock Source Select Control Register 2 … member
/hal_nuvoton-3.7.0/m46x/Devices/M460/Include/
Dclk_reg.h1490 …__IO uint32_t CLKSEL2; /*!< [0x0018] Clock Source Select Control Register 2 … member
/hal_nuvoton-3.7.0/dts/m46x/
Dclk_reg.h1490 …__IO uint32_t CLKSEL2; /*!< [0x0018] Clock Source Select Control Register 2 …