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Searched refs:size (Results 1 – 22 of 22) sorted by relevance

/hal_microchip-latest/mpfs/drivers/mss/mss_mmc/
Dmss_mmc_internal_api.h143 uint32_t size
313 uint32_t size
422 uint32_t size
514 uint32_t size
603 uint32_t size
Dmss_mmc.h633 uint32_t size
709 uint32_t size
788 uint32_t size
865 uint32_t size
1214 uint32_t size
1298 uint32_t size
Dmss_mmc.c220 uint32_t size
280 uint32_t size,
876 uint32_t size in MSS_MMC_sdma_read() argument
898 if (((size % blocklen) != MMC_CLEAR) || (size > (SIZE_32MB - BLK_SIZE)) in MSS_MMC_sdma_read()
899 || (size == MMC_CLEAR) || (dest == NULL_POINTER)) in MSS_MMC_sdma_read()
924 blockcount = ((size - MMC_SET) / blocklen) + MMC_SET; in MSS_MMC_sdma_read()
1008 uint32_t size in MSS_MMC_adma2_read() argument
1030 if (((size % blocklen) != MMC_CLEAR) || (size > (SIZE_32MB - BLK_SIZE)) in MSS_MMC_adma2_read()
1031 || (size == MMC_CLEAR) || (dest == NULL_POINTER)) in MSS_MMC_adma2_read()
1055 blockcount = ((size - MMC_SET) / blocklen) + MMC_SET; in MSS_MMC_adma2_read()
[all …]
/hal_microchip-latest/mpfs/mpfs_hal/common/
Dmss_mpu.c239 uint64_t size, in MSS_MPU_configure() argument
244 uint64_t temp = size, cnt=0ULL; in MSS_MPU_configure()
250 if((size >= 4096ULL) && (0U == (size & (size - 1U))) && (pmp_region < num_pmp_lut[master_port])) in MSS_MPU_configure()
277 uint64_t* size, in MSS_MPU_get_config() argument
288 *base = pmp_get_napot_base_and_range(reg, size); in MSS_MPU_get_config()
Dmss_mpu.h128 uint64_t size,
136 uint64_t* size,
/hal_microchip-latest/mpfs/mpfs_hal/common/nwc/
Dmss_ddr_debug.h233 uint32_t size,
244 uint32_t size
Dmss_ddr.c125 static uint8_t MTC_test(uint8_t mask, uint64_t start_address, uint32_t size, MTC_PATTERN pattern, M…
2177 uint32_t size = ONE_MB_MTC; /* Number of reads for each iteration 2**size*/ in ddr_setup() local
2187 … error = MTC_test(mask, start_address, size, MTC_COUNTING_PATTERN, MTC_ADD_SEQUENTIAL, &error); in ddr_setup()
2190 … error |= MTC_test(mask, start_address, size, MTC_COUNTING_PATTERN, MTC_ADD_SEQUENTIAL, &error); in ddr_setup()
2191 … error |= MTC_test(mask, start_address, size, MTC_WALKING_ONE, MTC_ADD_SEQUENTIAL, &error); in ddr_setup()
2192 … error |= MTC_test(mask, start_address, size, MTC_PSEUDO_RANDOM, MTC_ADD_SEQUENTIAL, &error); in ddr_setup()
2193 …error |= MTC_test(mask, start_address, size, MTC_NO_REPEATING_PSEUDO_RANDOM, MTC_ADD_SEQUENTIAL, &… in ddr_setup()
2194 … error |= MTC_test(mask, start_address, size, MTC_ALT_ONES_ZEROS, MTC_ADD_SEQUENTIAL, &error); in ddr_setup()
2195 … error |= MTC_test(mask, start_address, size, MTC_ALT_5_A, MTC_ADD_SEQUENTIAL, &error); in ddr_setup()
2196 … error |= MTC_test(mask, start_address, size, MTC_PSEUDO_RANDOM_16BIT, MTC_ADD_SEQUENTIAL, &error); in ddr_setup()
[all …]
Dmss_ddr_debug.c751 void load_ddr_pattern(uint64_t base, uint32_t size, uint8_t pattern_offset) in load_ddr_pattern() argument
762 while(((uint64_t)p_ddr + pattern_length) < (base + size)) in load_ddr_pattern()
844 uint32_t test_ddr(uint32_t no_of_iterations, uint32_t size) in test_ddr() argument
889 … if (((uint64_t)p_ddr_cached + ( 2 * pattern_length)) < (LIBERO_SETTING_DDR_32_CACHE + size)) in test_ddr()
/hal_microchip-latest/mpfs/platform_config_reference/linker/
Dmpfs-lim-lma-scratchpad-vma.ld70 * The stack size needs to be calculated for your
75 * stack hart0 Actual Stack size = (STACK_SIZE_PER_HART - HLS_DEBUG_AREA_SIZE)
85 * Stack size for each hart's startup code.
257 /* must be on 4k boundary- corresponds to page size */
265 /* must be on 4k boundary- corresponds to page size */
273 /* must be on 4k boundary- corresponds to page size */
298 /* must be on 4k boundary- corresponds to page size */
306 /* must be on 4k boundary- corresponds to page size */
Dmpfs-envm-lma-scratchpad-vma.ld78 * The stack size needs to be calculated for your
83 * stack hart0 Actual Stack size = (STACK_SIZE_PER_HART - HLS_DEBUG_AREA_SIZE)
93 * Stack size for each hart's startup code.
269 /* must be on 4k boundary- corresponds to page size */
277 /* must be on 4k boundary- corresponds to page size */
285 /* must be on 4k boundary- corresponds to page size */
310 /* must be on 4k boundary- corresponds to page size */
318 /* must be on 4k boundary- corresponds to page size */
Dmpfs-lim.ld67 * The stack size needs to be calculated for your
72 * stack hart0 Actual Stack size = (STACK_SIZE_PER_HART - HLS_DEBUG_AREA_SIZE)
81 * Stack size for each hart's application.
261 /* must be on 4k boundary- corresponds to page size */
Dmpfs-envm.ld79 * The stack size needs to be calculated for your
84 * stack hart0 Actual Stack size = (STACK_SIZE_PER_HART - HLS_DEBUG_AREA_SIZE)
93 * Stack size for each hart's application.
290 /* must be on 4k boundary (0x1000) - corresponds to page size, when using
Dmpfs-ddr-loaded-by-boot-loader.ld80 * Stack size for our single hart U54 application.
204 /* must be on 4k boundary- corresponds to page size */
/hal_microchip-latest/mpfs/drivers/mss/pf_pcie/
Dpf_pcie_types.h347 pf_pcie_atr_size_t size; member
Dpf_pcie.c999 phy_reg |= (uint32_t)((cfg->size) << PCIE_SET); in PF_PCIE_slave_atr_table_init()
/hal_microchip-latest/mec5/drivers/
Dmec_espi_taf.c376 if (!MEC_IS_PTR_ALIGNED4K(pr->start) || !MEC_IS_PTR_ALIGNED4K(pr->size)) { in mec_hal_espi_taf_pr_set()
384 pregs->LIMIT = (((pr->start + pr->size - 1u) >> MEC_TAF_PR_UNIT_SHIFT) in mec_hal_espi_taf_pr_set()
Dmec_espi_host_dev.c276 || (barcfg->size > MEC_ESPI_SRAM_BAR_SIZE_32KB)) { in mec_hal_espi_sram_bar_cfg()
281 temp = barcfg->size; in mec_hal_espi_sram_bar_cfg()
Dmec_espi_taf.h199 uint32_t size; member
Dmec_espi_pc.h213 uint8_t size; member
/hal_microchip-latest/mpfs/drivers/mss/mss_i2c/
Dmss_i2c.h520 …_ret_t (*mss_i2c_slave_wr_handler_t)( mss_i2c_instance_t *instance, uint8_t * data, uint16_t size);
/hal_microchip-latest/mpfs/boards/icicle-kit-es/platform_config/linker/
Dmpfs-ddr-e51.ld77 * Stack size for our single hart U54 application.
212 /* must be on 4k boundary- corresponds to page size */
/hal_microchip-latest/pinconfigs/
DREADME.md313 #size-cells = <0>;