Searched refs:fdiv (Results 1 – 3 of 3) sorted by relevance
84 uint32_t fdiv = (base->MODE & MEC_QSPI_MODE_CLKDIV_Msk) >> MEC_QSPI_MODE_CLKDIV_Pos; in qspi_get_freq() local86 if (fdiv == 0u) { /* zero is maximum clock divider */ in qspi_get_freq()87 fdiv = MEC_QSPI_M_FDIV_MAX; in qspi_get_freq()90 return (srcfreq / fdiv); in qspi_get_freq()104 uint32_t fdiv = 0; in mec_hal_qspi_freq_div() local107 fdiv = (base->MODE & MEC_QSPI_MODE_CLKDIV_Msk) >> MEC_QSPI_MODE_CLKDIV_Pos; in mec_hal_qspi_freq_div()110 if (fdiv == 0) { in mec_hal_qspi_freq_div()111 fdiv = 0x10000u; in mec_hal_qspi_freq_div()114 return fdiv; in mec_hal_qspi_freq_div()207 uint32_t fdiv; in compute_freq_divisor() local[all …]
140 uint32_t fdiv, max_freq; in mec_hal_pcr_cpu_clk_speed_set() local147 fdiv = max_freq / fhz; in mec_hal_pcr_cpu_clk_speed_set()149 if (fdiv == 0) { in mec_hal_pcr_cpu_clk_speed_set()150 fdiv = 1u; in mec_hal_pcr_cpu_clk_speed_set()152 if (fdiv > MEC_PCR_PLL_MAX_CLK_DIV) { in mec_hal_pcr_cpu_clk_speed_set()153 fdiv = MEC_PCR_PLL_MAX_CLK_DIV; in mec_hal_pcr_cpu_clk_speed_set()157 set_pcr_cpu_clk_div(fdiv); in mec_hal_pcr_cpu_clk_speed_set()
106 uint32_t fdiv = (regs->CLKSEL & 0xffu); in mec_hal_bcl_get_freq() local108 *freq_hz = (uint32_t)(MEC_BCL_SOURCE_CLOCK_FREQ) / (fdiv + 1u); in mec_hal_bcl_get_freq()
