Home
last modified time | relevance | path

Searched refs:devi (Results 1 – 18 of 18) sorted by relevance

/hal_microchip-latest/mec5/drivers/
Dmec_ecia.c509 void mec_hal_girq_ctrl(uint32_t devi, int enable) in mec_hal_girq_ctrl() argument
511 uint32_t gidx = MEC5_ECIA_INFO_GIRQZ(devi); in mec_hal_girq_ctrl()
512 uint32_t gpos = MEC5_ECIA_INFO_GIRQ_POS(devi); in mec_hal_girq_ctrl()
529 uint32_t mec_hal_girq_src(uint32_t devi) in mec_hal_girq_src() argument
531 uint32_t gidx = MEC5_ECIA_INFO_GIRQZ(devi); in mec_hal_girq_src()
532 uint32_t gpos = MEC5_ECIA_INFO_GIRQ_POS(devi); in mec_hal_girq_src()
541 uint32_t mec_hal_girq_result(uint32_t devi) in mec_hal_girq_result() argument
543 uint32_t gidx = MEC5_ECIA_INFO_GIRQZ(devi); in mec_hal_girq_result()
544 uint32_t gpos = MEC5_ECIA_INFO_GIRQ_POS(devi); in mec_hal_girq_result()
554 void mec_hal_girq_clr_src(uint32_t devi) in mec_hal_girq_clr_src() argument
[all …]
Dmec_ecia_api.h72 void mec_hal_girq_ctrl(uint32_t devi, int enable);
74 uint32_t mec_hal_girq_src(uint32_t devi);
75 uint32_t mec_hal_girq_result(uint32_t devi);
77 void mec_hal_girq_clr_src(uint32_t devi);
97 int mec_hal_ecia_is_direct(uint32_t devi);
102 void mec_hal_ecia_nvic_enable(uint32_t devi);
103 void mec_hal_ecia_nvic_disable(uint32_t devi);
105 void mec_hal_ecia_nvic_clr_pend(uint32_t devi);
107 uint32_t mec_hal_ecia_nvic_get_pending(uint32_t devi);
109 uint8_t mec_hal_ecia_nvic_get_pri(uint32_t devi);
[all …]
Dmec_ps2.c46 uint32_t devi; member
120 mec_hal_girq_ctrl(psi->devi, 0); in mec_hal_ps2_init()
121 mec_hal_girq_clr_src(psi->devi); in mec_hal_ps2_init()
137 mec_hal_girq_ctrl(psi->devi, 1); in mec_hal_ps2_init()
175 mec_hal_girq_ctrl(psi->devi, enable); in mec_hal_ps2_girq_ctrl()
188 mec_hal_girq_clr_src(psi->devi); in mec_hal_ps2_girq_clr()
201 return mec_hal_girq_result(psi->devi); in mec_hal_ps2_girq_result()
207 uint32_t devi = 0; in mec_hal_ps2_girq_wake_enable() local
217 devi = psi->port_a_wake_devi; in mec_hal_ps2_girq_wake_enable()
219 devi = psi->port_b_wake_devi; in mec_hal_ps2_girq_wake_enable()
[all …]
Dmec_htimer.c38 ctx->devi = MEC_HTMR0_ECIA_INFO; in mec_hal_htimer_init()
43 ctx->devi = MEC_HTMR1_ECIA_INFO; in mec_hal_htimer_init()
55 mec_hal_girq_ctrl(ctx->devi, 0); in mec_hal_htimer_init()
65 mec_hal_girq_clr_src(ctx->devi); in mec_hal_htimer_init()
66 mec_hal_girq_ctrl(ctx->devi, irq_en); in mec_hal_htimer_init()
79 mec_hal_girq_ctrl(ctx->devi, (int)enable); in mec_hal_htimer_intr_ctrl()
84 if (mec_hal_girq_src(ctx->devi)) { in mec_hal_htimer_status()
93 mec_hal_girq_clr_src(ctx->devi); in mec_hal_htimer_status_clear()
Dmec_mailbox.c27 uint32_t devi; member
60 mec_hal_girq_ctrl(mbi->devi, 0); in mec_hal_mbox_init()
68 mec_hal_girq_clr_src(mbi->devi); in mec_hal_mbox_init()
73 mec_hal_girq_ctrl(mbi->devi, 1); in mec_hal_mbox_init()
87 mec_hal_girq_ctrl(mbi->devi, enable); in mec_hal_mbox_girq_ctrl()
100 mec_hal_girq_clr_src(mbi->devi); in mec_hal_mbox_girq_clr()
113 return mec_hal_girq_result(mbi->devi); in mec_hal_mbox_girq_result()
Dmec_i3c.c28 uint32_t devi; member
65 ctx->devi = info->devi; in MEC_HAL_I3C_Controller_Clk_I2C_Init()
94 ctx->devi = info->devi; in MEC_HAL_I3C_Controller_Clk_Init()
145 ctx->devi = info->devi; in MEC_HAL_I3C_Target_Init()
222 mec_hal_girq_ctrl(info->devi, 0); in MEC_HAL_I3C_Target_Interrupts_Init()
240 mec_hal_girq_clr_src(info->devi); in MEC_HAL_I3C_Target_Interrupts_Init()
241 mec_hal_girq_ctrl(info->devi, 1); in MEC_HAL_I3C_Target_Interrupts_Init()
255 mec_hal_girq_ctrl(info->devi, 0); in MEC_HAL_I3C_Controller_Interrupts_Init()
273 mec_hal_girq_clr_src(info->devi); in MEC_HAL_I3C_Controller_Interrupts_Init()
274 mec_hal_girq_ctrl(info->devi, 1); in MEC_HAL_I3C_Controller_Interrupts_Init()
[all …]
Dmec_tach.c27 uint32_t devi; member
69 mec_hal_girq_ctrl(info->devi, 0); in mec_hal_tach_init()
70 mec_hal_girq_clr_src(info->devi); in mec_hal_tach_init()
111 mec_hal_girq_ctrl(info->devi, 1); in mec_hal_tach_init()
202 mec_hal_girq_clr_src(info->devi); in mec_hal_tach_girq_status_clr()
213 mec_hal_girq_ctrl(info->devi, enable); in mec_hal_tach_girq_enable()
Dmec_btimer.c41 uint32_t devi; member
107 mec_hal_girq_ctrl(info->devi, 0); in mec_hal_btimer_init()
115 mec_hal_girq_ctrl(info->devi, 1); in mec_hal_btimer_init()
207 mec_hal_girq_ctrl(info->devi, enable); in mec_hal_btimer_girq_ctrl()
220 mec_hal_girq_clr_src(info->devi); in mec_hal_btimer_girq_status_clr()
320 uint32_t devi = btimer_instances[btimer_fast_idx(regs)].devi; in mec_hal_btimer_intr_clr() local
323 mec_hal_girq_clr_src(devi); in mec_hal_btimer_intr_clr()
Dmec_emi.c31 uint32_t devi; member
73 mec_hal_girq_ctrl(info->devi, enable); in mec_hal_emi_girq_ctrl()
86 mec_hal_girq_clr_src(info->devi); in mec_hal_emi_girq_clr()
99 return mec_hal_girq_result(info->devi); in mec_hal_emi_girq_result()
115 mec_hal_girq_ctrl(info->devi, 0); in mec_hal_emi_init()
122 mec_hal_girq_clr_src(info->devi); in mec_hal_emi_init()
Dmec_acpi_ec.c63 uint32_t devi[MEC_ACPI_EC_NUM_IRQS]; member
151 bm |= MEC_BIT(MEC5_ECIA_INFO_GIRQ_POS(info->devi[MEC_ACPI_EC_IBF_DEVI_IDX])); in acpi_ec_irq_bitmap()
155 bm |= MEC_BIT(MEC5_ECIA_INFO_GIRQ_POS(info->devi[MEC_ACPI_EC_OBE_DEVI_IDX])); in acpi_ec_irq_bitmap()
221 ibf_bit = MEC5_ECIA_INFO_GIRQ_POS(info->devi[MEC_ACPI_EC_IBF_DEVI_IDX]); in mec_hal_acpi_ec_girq_result()
222 obe_bit = MEC5_ECIA_INFO_GIRQ_POS(info->devi[MEC_ACPI_EC_OBE_DEVI_IDX]); in mec_hal_acpi_ec_girq_result()
Dmec_bbled.c39 uint32_t devi; member
170 mec_hal_girq_ctrl(info->devi, 0); in mec_hal_bbled_init()
180 mec_hal_girq_clr_src(info->devi); in mec_hal_bbled_init()
203 mec_hal_girq_ctrl(info->devi, enable); in mec_hal_bbled_girq_ctrl()
216 mec_hal_girq_clr_src(info->devi); in mec_hal_bbled_girq_status_clr()
Dmec_uart.c22 uint32_t devi; member
429 mec_hal_girq_ctrl(info->devi, 0); in mec_hal_uart_init()
468 mec_hal_girq_clr_src(info->devi); in mec_hal_uart_init()
470 mec_hal_girq_ctrl(info->devi, 1); in mec_hal_uart_init()
495 mec_hal_girq_ctrl(info->devi, enable); in mec_hal_uart_girq_ctrl()
508 mec_hal_girq_clr_src(info->devi); in mec_hal_uart_girq_clear()
517 if (info && mec_hal_girq_src(info->devi)) { in mec_hal_uart_is_girq_status()
528 if (info && mec_hal_girq_result(info->devi)) { in mec_hal_uart_is_girq_result()
Dmec_i2c.c87 uint32_t devi; member
241 ctx->devi = info->devi; in mec_hal_i2c_smb_init()
266 mec_hal_girq_clr_src(ctx->devi); in mec_hal_i2c_smb_init()
360 mec_hal_girq_clr_src(ctx->devi); in mec_hal_i2c_smb_girq_status_clr()
373 mec_hal_girq_ctrl(ctx->devi, 0); in mec_hal_i2c_smb_girq_ctrl()
377 mec_hal_girq_clr_src(ctx->devi); in mec_hal_i2c_smb_girq_ctrl()
381 mec_hal_girq_ctrl(ctx->devi, 1); in mec_hal_i2c_smb_girq_ctrl()
393 return (int)mec_hal_girq_src(ctx->devi); in mec_hal_i2c_smb_girq_status()
402 return (int)mec_hal_girq_result(ctx->devi); in mec_hal_i2c_smb_girq_result()
Dmec_dmac.c97 uint32_t devi = dmac_get_ecia_info(channel); in dma_chan_ia_enable() local
99 mec_hal_girq_ctrl(devi, 1u); in dma_chan_ia_enable()
104 uint32_t devi = dmac_get_ecia_info(channel); in dma_chan_ia_disable() local
106 mec_hal_girq_ctrl(devi, 0); in dma_chan_ia_disable()
111 uint32_t devi = dmac_get_ecia_info(channel); in dmac_clr_ia_status() local
113 mec_hal_girq_clr_src(devi); in dmac_clr_ia_status()
Dmec_htimer_api.h40 uint32_t devi; member
Dmec_qspi.c53 uint32_t devi; member
249 mec_hal_girq_ctrl(info->devi, 0); in qspi_intr_clr_dis()
250 mec_hal_girq_clr_src(info->devi); in qspi_intr_clr_dis()
543 mec_hal_girq_ctrl(info->devi, 1); in mec_hal_qspi_init()
Dmec_i2c_api.h128 uint32_t devi; member
Dmec_i3c_api.h15 uint32_t devi; member