509 void mec_hal_girq_ctrl(uint32_t devi, int enable)  in mec_hal_girq_ctrl()  argument
511     uint32_t gidx = MEC5_ECIA_INFO_GIRQZ(devi);  in mec_hal_girq_ctrl()
512     uint32_t gpos = MEC5_ECIA_INFO_GIRQ_POS(devi);  in mec_hal_girq_ctrl()
529 uint32_t mec_hal_girq_src(uint32_t devi)  in mec_hal_girq_src()  argument
531     uint32_t gidx = MEC5_ECIA_INFO_GIRQZ(devi);  in mec_hal_girq_src()
532     uint32_t gpos = MEC5_ECIA_INFO_GIRQ_POS(devi);  in mec_hal_girq_src()
541 uint32_t mec_hal_girq_result(uint32_t devi)  in mec_hal_girq_result()  argument
543     uint32_t gidx = MEC5_ECIA_INFO_GIRQZ(devi);  in mec_hal_girq_result()
544     uint32_t gpos = MEC5_ECIA_INFO_GIRQ_POS(devi);  in mec_hal_girq_result()
554 void mec_hal_girq_clr_src(uint32_t devi)  in mec_hal_girq_clr_src()  argument
556     uint32_t gidx = MEC5_ECIA_INFO_GIRQZ(devi);  in mec_hal_girq_clr_src()
557     uint32_t gpos = MEC5_ECIA_INFO_GIRQ_POS(devi);  in mec_hal_girq_clr_src()
591 int mec_hal_ecia_is_direct(uint32_t devi)  in mec_hal_ecia_is_direct()  argument
598     uint32_t girq_num = MEC5_ECIA_INFO_GIRQZ(devi) + MEC5_ECIA_FIRST_GIRQ_NOS;  in mec_hal_ecia_is_direct()
614 void mec_hal_ecia_nvic_enable(uint32_t devi)  in mec_hal_ecia_nvic_enable()  argument
616     uint32_t nvic_extn = MEC5_ECIA_INFO_NVIC_AGGR(devi);  in mec_hal_ecia_nvic_enable()
618     if (mec_hal_ecia_is_direct(devi)) {  in mec_hal_ecia_nvic_enable()
619         nvic_extn = MEC5_ECIA_INFO_NVIC_DIRECT(devi);  in mec_hal_ecia_nvic_enable()
625 void mec_hal_ecia_nvic_disable(uint32_t devi)  in mec_hal_ecia_nvic_disable()  argument
627     uint32_t nvic_extn = MEC5_ECIA_INFO_NVIC_AGGR(devi);  in mec_hal_ecia_nvic_disable()
629     if (mec_hal_ecia_is_direct(devi)) {  in mec_hal_ecia_nvic_disable()
630         nvic_extn = MEC5_ECIA_INFO_NVIC_DIRECT(devi);  in mec_hal_ecia_nvic_disable()
636 void mec_hal_ecia_nvic_clr_pend(uint32_t devi)  in mec_hal_ecia_nvic_clr_pend()  argument
638     uint32_t nvic_extn = MEC5_ECIA_INFO_NVIC_AGGR(devi);  in mec_hal_ecia_nvic_clr_pend()
640     if (mec_hal_ecia_is_direct(devi)) {  in mec_hal_ecia_nvic_clr_pend()
641         nvic_extn = MEC5_ECIA_INFO_NVIC_DIRECT(devi);  in mec_hal_ecia_nvic_clr_pend()
647 uint32_t mec_hal_ecia_nvic_get_pending(uint32_t devi)  in mec_hal_ecia_nvic_get_pending()  argument
649     uint32_t extn = MEC5_ECIA_INFO_NVIC_AGGR(devi);  in mec_hal_ecia_nvic_get_pending()
651     if (mec_hal_ecia_is_direct(devi)) {  in mec_hal_ecia_nvic_get_pending()
652         extn = MEC5_ECIA_INFO_NVIC_DIRECT(devi);  in mec_hal_ecia_nvic_get_pending()
658 uint8_t mec_hal_ecia_nvic_get_pri(uint32_t devi)  in mec_hal_ecia_nvic_get_pri()  argument
660     uint32_t extn = MEC5_ECIA_INFO_NVIC_AGGR(devi);  in mec_hal_ecia_nvic_get_pri()
662     if (mec_hal_ecia_is_direct(devi)) {  in mec_hal_ecia_nvic_get_pri()
663         extn = MEC5_ECIA_INFO_NVIC_DIRECT(devi);  in mec_hal_ecia_nvic_get_pri()
669 void mec_hal_ecia_nvic_set_pri(uint32_t devi, uint8_t priority)  in mec_hal_ecia_nvic_set_pri()  argument
671     uint32_t extn = MEC5_ECIA_INFO_NVIC_AGGR(devi);  in mec_hal_ecia_nvic_set_pri()
673     if (mec_hal_ecia_is_direct(devi)) {  in mec_hal_ecia_nvic_set_pri()
674         extn = MEC5_ECIA_INFO_NVIC_DIRECT(devi);  in mec_hal_ecia_nvic_set_pri()