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Searched refs:ctrl (Results 1 – 16 of 16) sorted by relevance

/hal_microchip-latest/mec5/drivers/
Dmec_rtimer.c23 uint32_t ctrl = 0; in mec_hal_rtimer_init() local
36 ctrl |= MEC_BIT(MEC_RTMR_CTRL_ENABLE_Pos); in mec_hal_rtimer_init()
40 ctrl |= MEC_BIT(MEC_RTMR_CTRL_AUTO_RELOAD_Pos); in mec_hal_rtimer_init()
44 ctrl |= MEC_BIT(MEC_RTMR_CTRL_START_Pos); in mec_hal_rtimer_init()
48 ctrl |= MEC_BIT(MEC_RTMR_CTRL_EXT_HALT_Pos); in mec_hal_rtimer_init()
58 regs->CTRL = ctrl; in mec_hal_rtimer_init()
110 uint32_t ctrl = regs->CTRL; in mec_hal_rtimer_restart() local
113 ctrl &= (uint32_t)~MEC_BIT(MEC_RTMR_CTRL_FW_HALT_Pos); in mec_hal_rtimer_restart()
114 ctrl |= MEC_BIT(MEC_RTMR_CTRL_ENABLE_Pos); in mec_hal_rtimer_restart()
116 ctrl |= MEC_BIT(MEC_RTMR_CTRL_START_Pos); in mec_hal_rtimer_restart()
[all …]
Dmec_dmac.c77 uint32_t ctrl; member
339 uint32_t ctrl = 0; in mec_hal_dma_chan_start() local
350 ctrl = regs->CTRL; in mec_hal_dma_chan_start()
352 if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_DHFC_Pos)) { in mec_hal_dma_chan_start()
356 ctrl &= (uint32_t)~(MEC_BIT(MEC_DMA_CHAN_CTRL_HFC_RUN_Pos) in mec_hal_dma_chan_start()
364 dbg_mec_dma[chan].ctrl = ctrl | MEC_BIT(start_pos); in mec_hal_dma_chan_start()
370 regs->CTRL = ctrl | MEC_BIT(start_pos); in mec_hal_dma_chan_start()
444 uint32_t ctrl = 0; in mec_hal_dma_chan_hwfc_set() local
452 ctrl = regs->CTRL & (uint32_t)~(MEC_DMA_CHAN_CTRL_HFC_DEV_Msk); in mec_hal_dma_chan_hwfc_set()
453 ctrl |= (((uint32_t)hwfc_dev << MEC_DMA_CHAN_CTRL_HFC_DEV_Pos) in mec_hal_dma_chan_hwfc_set()
[all …]
Dmec_tach.c54 uint32_t ctrl = 0, temp = 0; in mec_hal_tach_init() local
78 ctrl |= ((temp << MEC_TACH_CTRL_EDGES_Pos) & MEC_TACH_CTRL_EDGES_Msk); in mec_hal_tach_init()
81 ctrl |= MEC_BIT(MEC_TACH_CTRL_FILT_IN_Pos); in mec_hal_tach_init()
88 ctrl |= MEC_BIT(MEC_TACH_CTRL_RDMODE_Pos); in mec_hal_tach_init()
92 ctrl |= MEC_BIT(MEC_TACH_CTRL_ENOOL_Pos); in mec_hal_tach_init()
97 ctrl |= MEC_BIT(MEC_TACH_CTRL_CNTRDY_IEN_Pos); in mec_hal_tach_init()
102 ctrl |= MEC_BIT(MEC_TACH_CTRL_INTOG_IEN_Pos); in mec_hal_tach_init()
107 ctrl |= MEC_BIT(MEC_TACH_CTRL_ENABLE_Pos); in mec_hal_tach_init()
114 regs->CTRL = ctrl; in mec_hal_tach_init()
Dmec_btimer.c153 uint32_t ctrl = 0, msk = 0; in mec_hal_btimer_reset() local
167 ctrl = regs->CTRL; in mec_hal_btimer_reset()
172 regs->CTRL = (regs->CTRL & (uint32_t)~msk) | (ctrl & msk); in mec_hal_btimer_reset()
228 uint32_t ctrl = regs->CTRL; in mec_hal_btimer_pre_and_reload() local
231 ctrl |= (MEC_BIT(MEC_BTMR_CTRL_RELOAD_Pos) | MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos) in mec_hal_btimer_pre_and_reload()
234 regs->CTRL = ctrl; in mec_hal_btimer_pre_and_reload()
244 uint32_t ctrl = regs->CTRL; in mec_hal_btimer_start_load() local
246 ctrl |= (MEC_BIT(MEC_BTMR_CTRL_ENABLE_Pos) | MEC_BIT(MEC_BTMR_CTRL_START_Pos)); in mec_hal_btimer_start_load()
253 ctrl |= MEC_BIT(MEC_BTMR_CTRL_RESTART_Pos); in mec_hal_btimer_start_load()
256 ctrl &= (uint32_t)~MEC_BIT(MEC_BTMR_CTRL_RESTART_Pos); in mec_hal_btimer_start_load()
[all …]
Dmec_wdt.c40 uint32_t ctrl = 0u; in mec_hal_wdt_init() local
46 regs->CTRL = ctrl; in mec_hal_wdt_init()
56 ctrl |= MEC_BIT(MEC_WDT_CTRL_ENABLE_Pos); in mec_hal_wdt_init()
59 ctrl |= MEC_BIT(MEC_WDT_CTRL_STALL_HTMR_Pos); in mec_hal_wdt_init()
62 ctrl |= MEC_BIT(MEC_WDT_CTRL_STALL_WKTMR_Pos); in mec_hal_wdt_init()
65 ctrl |= MEC_BIT(MEC_WDT_CTRL_STALL_JTAG_Pos); in mec_hal_wdt_init()
68 ctrl |= MEC_BIT(MEC_WDT_CTRL_RST_MODE_INTR_Pos); in mec_hal_wdt_init()
73 regs->CTRL = ctrl; in mec_hal_wdt_init()
Dmec_gpio.c412 int mec_hal_gpio_get_ctrl_property(uint32_t ctrl, uint8_t prop_id, uint8_t *prop) in mec_hal_gpio_get_ctrl_property() argument
421 *prop = (uint8_t)((ctrl >> bpos) & msk0); in mec_hal_gpio_get_ctrl_property()
426 uint32_t mec_hal_gpio_set_ctrl_property(uint32_t ctrl, uint8_t prop_id, uint8_t val) in mec_hal_gpio_set_ctrl_property() argument
429 return ctrl; in mec_hal_gpio_set_ctrl_property()
435 ctrl = (ctrl & ~(msk0 << bpos)) | (((uint32_t)val & msk0) << bpos); in mec_hal_gpio_set_ctrl_property()
437 return ctrl; in mec_hal_gpio_set_ctrl_property()
515 uint32_t ctrl = MEC_GPIO->CTRL[pin]; in mec_hal_gpio_set_props() local
527 ctrl = (ctrl & ~(mask << bitpos)) | (val << bitpos); in mec_hal_gpio_set_props()
532 MEC_GPIO->CTRL[pin] = ctrl; in mec_hal_gpio_set_props()
617 uint32_t ctrl; in mec_hal_gpio_pin_config() local
[all …]
Dmec_adc.c113 uint32_t ctrl = 0; in mec_hal_adc_activate() local
119 ctrl = regs->CTRL & ~msk; in mec_hal_adc_activate()
121 ctrl |= MEC_BIT(MEC_ADC_CTRL_ACTV_Pos); in mec_hal_adc_activate()
123 ctrl &= (uint32_t)~MEC_BIT(MEC_ADC_CTRL_ACTV_Pos); in mec_hal_adc_activate()
126 regs->CTRL = ctrl; in mec_hal_adc_activate()
351 uint32_t ctrl = MEC_ADC0->CTRL; in mec_hal_adc_pm_save_disable() local
354 if (ctrl & MEC_BIT(MEC_ADC_CTRL_ACTV_Pos)) { in mec_hal_adc_pm_save_disable()
361 ctrl &= MEC_BIT( MEC_ADC_CTRL_RSTART_Pos) | MEC_BIT(MEC_ADC_CTRL_PWR_SAVE_Pos); in mec_hal_adc_pm_save_disable()
362 MEC_ADC0->CTRL = ctrl; in mec_hal_adc_pm_save_disable()
367 uint32_t ctrl = MEC_ADC0->CTRL & (MEC_BIT( MEC_ADC_CTRL_RSTART_Pos) in mec_hal_adc_pm_restore() local
[all …]
Dmec_kbc.c71 uint8_t ctrl = 0u, msk = 0u, val = 0u; in mec_hal_kbc_init() local
91 ctrl |= MEC_BIT(MEC_KBC_KECR_SAEN_Pos); in mec_hal_kbc_init()
95 ctrl |= MEC_BIT(MEC_KBC_KECR_OBFEN_Pos); in mec_hal_kbc_init()
99 ctrl |= MEC_BIT(MEC_KBC_KECR_PCOBFEN_Pos); in mec_hal_kbc_init()
102 ctrl |= MEC_BIT(MEC_KBC_KECR_AUXH_Pos); in mec_hal_kbc_init()
107 ctrl |= MEC_BIT(MEC_KBC_KECR_UD3_Pos); in mec_hal_kbc_init()
113 ctrl |= MEC_BIT(MEC_KBC_KECR_UD4_Pos); in mec_hal_kbc_init()
116 ctrl |= MEC_BIT(MEC_KBC_KECR_UD4_Pos + 1); in mec_hal_kbc_init()
122 ctrl |= MEC_BIT(MEC_KBC_KECR_UD5_Pos); in mec_hal_kbc_init()
154 base->KECR = ctrl; in mec_hal_kbc_init()
Dmec_wktimer.c81 uint32_t ctrl = 0, swctrl = 0; in mec_hal_wktimer_init() local
105 ctrl |= MEC_BIT(MEC_WKTMR_CTRL_PUPEV_Pos); in mec_hal_wktimer_init()
109 ctrl |= MEC_BIT(MEC_WKTMR_CTRL_TIMER_Pos); in mec_hal_wktimer_init()
117 regs->CTRL = ctrl; in mec_hal_wktimer_init()
Dmec_ps2.c107 uint8_t ctrl = 0u; in mec_hal_ps2_init() local
125 ctrl |= (uint8_t)((temp << MEC_PS2_CTRL_PARITY_Pos) & MEC_PS2_CTRL_PARITY_Msk); in mec_hal_ps2_init()
128 ctrl |= (uint8_t)((temp << MEC_PS2_CTRL_STOP_Pos) & MEC_PS2_CTRL_STOP_Msk); in mec_hal_ps2_init()
131 ctrl |= MEC_BIT(MEC_PS2_CTRL_ENABLE_Pos); in mec_hal_ps2_init()
134 regs->CTRL = ctrl; in mec_hal_ps2_init()
Dmec_espi_pc.c194 uint32_t ctrl = iobase->PCLTRCTL & (uint32_t)~(MEC_ESPI_IO_PCLTRCTL_LTR_TX_TAG_Msk); in mec_hal_espi_pc_ltr_ctrl() local
196 ctrl |= (((uint32_t)tag << MEC_ESPI_IO_PCLTRCTL_LTR_TX_TAG_Pos) in mec_hal_espi_pc_ltr_ctrl()
199 iobase->PCLTRCTL = ctrl; in mec_hal_espi_pc_ltr_ctrl()
Dmec_i2c.c425 int mec_hal_i2c_smb_ctrl_set(struct mec_i2c_smb_ctx *ctx, uint8_t ctrl) in mec_hal_i2c_smb_ctrl_set() argument
434 ctx->i2c_ctrl_cached = ctrl; in mec_hal_i2c_smb_ctrl_set()
435 base->CTRL = ctrl; in mec_hal_i2c_smb_ctrl_set()
457 uint8_t ctrl = ctx->i2c_ctrl_cached; in mec_hal_i2c_cmd_ack_ctrl() local
460 ctrl |= MEC_BIT(MEC_I2C_SMB_CTRL_ACK_Pos); in mec_hal_i2c_cmd_ack_ctrl()
462 ctrl &= (uint8_t)~MEC_BIT(MEC_I2C_SMB_CTRL_ACK_Pos); in mec_hal_i2c_cmd_ack_ctrl()
465 ctx->i2c_ctrl_cached = ctrl; in mec_hal_i2c_cmd_ack_ctrl()
466 base->CTRL = ctrl; in mec_hal_i2c_cmd_ack_ctrl()
1025 state->ctrl = (uint16_t)(r & 0xffu); in mec_hal_i2c_nl_state_get()
1030 state->ctrl = (uint16_t)(r & 0xffffu); in mec_hal_i2c_nl_state_get()
Dmec_peci.c218 uint8_t ctrl = regs->CTRL; in mec_hal_peci_set_opt_bit_time() local
220 regs->CTRL = ctrl | MEC_BIT(MEC_PECI_CTRL_PWRDN_Pos); in mec_hal_peci_set_opt_bit_time()
223 regs->CTRL = ctrl; in mec_hal_peci_set_opt_bit_time()
Dmec_qspi.c900 static uint32_t qspi_clocks_to_bits(uint32_t ctrl, uint32_t nclocks) in qspi_clocks_to_bits() argument
902 uint32_t ifm = (ctrl & MEC_QSPI_CTRL_IFM_Msk) >> MEC_QSPI_CTRL_IFM_Pos; in qspi_clocks_to_bits()
1140 uint32_t ctrl = 0; in mec_hal_qspi_ldma_cfg1() local
1151 ctrl = ((uint32_t)MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_1B << MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_Pos); in mec_hal_qspi_ldma_cfg1()
1168 ctrl |= MEC_BIT(MEC_QSPI_LDMA_CHAN_CTRL_INCRA_Pos); in mec_hal_qspi_ldma_cfg1()
1174 ctrl &= (uint32_t)~MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_Msk; in mec_hal_qspi_ldma_cfg1()
1175 ctrl |= ((uint32_t)MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_4B << MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_Pos); in mec_hal_qspi_ldma_cfg1()
1178 ldma_regs->CTRL = ctrl | MEC_BIT(MEC_QSPI_LDMA_CHAN_CTRL_EN_Pos); in mec_hal_qspi_ldma_cfg1()
Dmec_i2c_api.h143 int mec_hal_i2c_smb_ctrl_set(struct mec_i2c_smb_ctx *ctx, uint8_t ctrl);
207 uint16_t ctrl; member
Dmec_gpio_api.h307 int mec_hal_gpio_get_ctrl_property(uint32_t ctrl, uint8_t prop_id, uint8_t *prop);
313 uint32_t mec_hal_gpio_set_ctrl_property(uint32_t ctrl, uint8_t prop_id, uint8_t val);
342 int mec_hal_gpio_get_ctrl(uint32_t pin, uint32_t *ctrl);