77     uint32_t  ctrl;  member
339     uint32_t ctrl = 0;  in mec_hal_dma_chan_start()  local
350     ctrl = regs->CTRL;  in mec_hal_dma_chan_start()
352     if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_DHFC_Pos)) {  in mec_hal_dma_chan_start()
356     ctrl &= (uint32_t)~(MEC_BIT(MEC_DMA_CHAN_CTRL_HFC_RUN_Pos)  in mec_hal_dma_chan_start()
364     dbg_mec_dma[chan].ctrl = ctrl | MEC_BIT(start_pos);  in mec_hal_dma_chan_start()
370     regs->CTRL = ctrl | MEC_BIT(start_pos);  in mec_hal_dma_chan_start()
444     uint32_t ctrl = 0;  in mec_hal_dma_chan_hwfc_set()  local
452     ctrl = regs->CTRL & (uint32_t)~(MEC_DMA_CHAN_CTRL_HFC_DEV_Msk);  in mec_hal_dma_chan_hwfc_set()
453     ctrl |= (((uint32_t)hwfc_dev << MEC_DMA_CHAN_CTRL_HFC_DEV_Pos)  in mec_hal_dma_chan_hwfc_set()
455     regs->CTRL = ctrl;  in mec_hal_dma_chan_hwfc_set()
515     uint32_t ctrl = 0, v = 0;  in mec_hal_dma_chan_mem_units_set()  local
529     ctrl = regs->CTRL & (uint32_t)~MEC_DMA_CHAN_CTRL_UNITSZ_Msk;  in mec_hal_dma_chan_mem_units_set()
530     ctrl |= v;  in mec_hal_dma_chan_mem_units_set()
531     regs->CTRL = ctrl;  in mec_hal_dma_chan_mem_units_set()
611     uint32_t ctrl = 0u; /* dir = Dev2Mem, IncrMem=0, IncrDev=0 */  in mec_hal_dma_chan_cfg()  local
626     ctrl = usz << MEC_DMA_CHAN_CTRL_UNITSZ_Pos;  in mec_hal_dma_chan_cfg()
628         ctrl |= MEC_BIT(MEC_DMA_CHAN_CTRL_MEM2DEV_Pos);  in mec_hal_dma_chan_cfg()
633             ctrl |= MEC_BIT(MEC_DMA_CHAN_CTRL_INCRM_Pos);  in mec_hal_dma_chan_cfg()
636             ctrl |= MEC_BIT(MEC_DMA_CHAN_CTRL_INCRD_Pos);  in mec_hal_dma_chan_cfg()
643             ctrl |= MEC_BIT(MEC_DMA_CHAN_CTRL_INCRD_Pos);  in mec_hal_dma_chan_cfg()
646             ctrl |= MEC_BIT(MEC_DMA_CHAN_CTRL_INCRM_Pos);  in mec_hal_dma_chan_cfg()
651         ctrl |= (((uint32_t)cfg->hwfc_dev << MEC_DMA_CHAN_CTRL_HFC_DEV_Pos)  in mec_hal_dma_chan_cfg()
654         ctrl |= MEC_BIT(MEC_DMA_CHAN_CTRL_DHFC_Pos);  in mec_hal_dma_chan_cfg()
657     regs->CTRL = ctrl;  in mec_hal_dma_chan_cfg()
666     uint32_t ctrl = 0u, dstart = 0u, mstart = 0u, mend = 0u;  in mec_hal_dma_chan_cfg_get()  local
676     ctrl = regs->CTRL;  in mec_hal_dma_chan_cfg_get()
677     if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_DHFC_Pos)) {  in mec_hal_dma_chan_cfg_get()
680         cfg->hwfc_dev =  (ctrl & MEC_DMA_CHAN_CTRL_HFC_DEV_Msk) >> MEC_DMA_CHAN_CTRL_HFC_DEV_Pos;  in mec_hal_dma_chan_cfg_get()
683     if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_MEM2DEV_Pos)) {  in mec_hal_dma_chan_cfg_get()
685         if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_INCRM_Pos)) {  in mec_hal_dma_chan_cfg_get()
688         if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_INCRD_Pos)) {  in mec_hal_dma_chan_cfg_get()
693         if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_INCRM_Pos)) {  in mec_hal_dma_chan_cfg_get()
696         if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_INCRD_Pos)) {  in mec_hal_dma_chan_cfg_get()
709     if (ctrl & MEC_BIT(MEC_DMA_CHAN_CTRL_MEM2DEV_Pos)) {  in mec_hal_dma_chan_cfg_get()