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Searched refs:TCC_FCTRLB_SRC_Pos (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg41/component/
Dtcc.h335 #define TCC_FCTRLB_SRC_Pos _UINT32_(0) … macro
336 #define TCC_FCTRLB_SRC_Msk (_UINT32_(0x3) << TCC_FCTRLB_SRC_Pos) …
337 …C(value) (TCC_FCTRLB_SRC_Msk & (_UINT32_(value) << TCC_FCTRLB_SRC_Pos)) /* Assignm…
342 #define TCC_FCTRLB_SRC_DISABLE (TCC_FCTRLB_SRC_DISABLE_Val << TCC_FCTRLB_SRC_Pos) …
343 #define TCC_FCTRLB_SRC_ENABLE (TCC_FCTRLB_SRC_ENABLE_Val << TCC_FCTRLB_SRC_Pos) …
344 #define TCC_FCTRLB_SRC_INVERT (TCC_FCTRLB_SRC_INVERT_Val << TCC_FCTRLB_SRC_Pos) …
345 #define TCC_FCTRLB_SRC_ALTFAULT (TCC_FCTRLB_SRC_ALTFAULT_Val << TCC_FCTRLB_SRC_Pos) …
/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg61/component/
Dtcc.h335 #define TCC_FCTRLB_SRC_Pos _UINT32_(0) … macro
336 #define TCC_FCTRLB_SRC_Msk (_UINT32_(0x3) << TCC_FCTRLB_SRC_Pos) …
337 …C(value) (TCC_FCTRLB_SRC_Msk & (_UINT32_(value) << TCC_FCTRLB_SRC_Pos)) /* Assigme…
342 #define TCC_FCTRLB_SRC_DISABLE (TCC_FCTRLB_SRC_DISABLE_Val << TCC_FCTRLB_SRC_Pos) …
343 #define TCC_FCTRLB_SRC_ENABLE (TCC_FCTRLB_SRC_ENABLE_Val << TCC_FCTRLB_SRC_Pos) …
344 #define TCC_FCTRLB_SRC_INVERT (TCC_FCTRLB_SRC_INVERT_Val << TCC_FCTRLB_SRC_Pos) …
345 #define TCC_FCTRLB_SRC_ALTFAULT (TCC_FCTRLB_SRC_ALTFAULT_Val << TCC_FCTRLB_SRC_Pos) …
/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg60/component/
Dtcc.h335 #define TCC_FCTRLB_SRC_Pos _UINT32_(0) … macro
336 #define TCC_FCTRLB_SRC_Msk (_UINT32_(0x3) << TCC_FCTRLB_SRC_Pos) …
337 …C(value) (TCC_FCTRLB_SRC_Msk & (_UINT32_(value) << TCC_FCTRLB_SRC_Pos)) /* Assigme…
342 #define TCC_FCTRLB_SRC_DISABLE (TCC_FCTRLB_SRC_DISABLE_Val << TCC_FCTRLB_SRC_Pos) …
343 #define TCC_FCTRLB_SRC_ENABLE (TCC_FCTRLB_SRC_ENABLE_Val << TCC_FCTRLB_SRC_Pos) …
344 #define TCC_FCTRLB_SRC_INVERT (TCC_FCTRLB_SRC_INVERT_Val << TCC_FCTRLB_SRC_Pos) …
345 #define TCC_FCTRLB_SRC_ALTFAULT (TCC_FCTRLB_SRC_ALTFAULT_Val << TCC_FCTRLB_SRC_Pos) …