Home
last modified time | relevance | path

Searched refs:TCC_FCTRLB_HALT_Pos (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg41/component/
Dtcc.h366 #define TCC_FCTRLB_HALT_Pos _UINT32_(8) … macro
367 #define TCC_FCTRLB_HALT_Msk (_UINT32_(0x3) << TCC_FCTRLB_HALT_Pos) …
368 …T(value) (TCC_FCTRLB_HALT_Msk & (_UINT32_(value) << TCC_FCTRLB_HALT_Pos)) /* Assign…
373 #define TCC_FCTRLB_HALT_DISABLE (TCC_FCTRLB_HALT_DISABLE_Val << TCC_FCTRLB_HALT_Pos) …
374 #define TCC_FCTRLB_HALT_HW (TCC_FCTRLB_HALT_HW_Val << TCC_FCTRLB_HALT_Pos) …
375 #define TCC_FCTRLB_HALT_SW (TCC_FCTRLB_HALT_SW_Val << TCC_FCTRLB_HALT_Pos) …
376 #define TCC_FCTRLB_HALT_NR (TCC_FCTRLB_HALT_NR_Val << TCC_FCTRLB_HALT_Pos) …
/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg61/component/
Dtcc.h366 #define TCC_FCTRLB_HALT_Pos _UINT32_(8) … macro
367 #define TCC_FCTRLB_HALT_Msk (_UINT32_(0x3) << TCC_FCTRLB_HALT_Pos) …
368 …T(value) (TCC_FCTRLB_HALT_Msk & (_UINT32_(value) << TCC_FCTRLB_HALT_Pos)) /* Assigm…
373 #define TCC_FCTRLB_HALT_DISABLE (TCC_FCTRLB_HALT_DISABLE_Val << TCC_FCTRLB_HALT_Pos) …
374 #define TCC_FCTRLB_HALT_HW (TCC_FCTRLB_HALT_HW_Val << TCC_FCTRLB_HALT_Pos) …
375 #define TCC_FCTRLB_HALT_SW (TCC_FCTRLB_HALT_SW_Val << TCC_FCTRLB_HALT_Pos) …
376 #define TCC_FCTRLB_HALT_NR (TCC_FCTRLB_HALT_NR_Val << TCC_FCTRLB_HALT_Pos) …
/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg60/component/
Dtcc.h366 #define TCC_FCTRLB_HALT_Pos _UINT32_(8) … macro
367 #define TCC_FCTRLB_HALT_Msk (_UINT32_(0x3) << TCC_FCTRLB_HALT_Pos) …
368 …T(value) (TCC_FCTRLB_HALT_Msk & (_UINT32_(value) << TCC_FCTRLB_HALT_Pos)) /* Assigm…
373 #define TCC_FCTRLB_HALT_DISABLE (TCC_FCTRLB_HALT_DISABLE_Val << TCC_FCTRLB_HALT_Pos) …
374 #define TCC_FCTRLB_HALT_HW (TCC_FCTRLB_HALT_HW_Val << TCC_FCTRLB_HALT_Pos) …
375 #define TCC_FCTRLB_HALT_SW (TCC_FCTRLB_HALT_SW_Val << TCC_FCTRLB_HALT_Pos) …
376 #define TCC_FCTRLB_HALT_NR (TCC_FCTRLB_HALT_NR_Val << TCC_FCTRLB_HALT_Pos) …