Home
last modified time | relevance | path

Searched refs:TCC_FCTRLA_SRC_Pos (Results 1 – 3 of 3) sorted by relevance

/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg41/component/
Dtcc.h248 #define TCC_FCTRLA_SRC_Pos _UINT32_(0) … macro
249 #define TCC_FCTRLA_SRC_Msk (_UINT32_(0x3) << TCC_FCTRLA_SRC_Pos) …
250 …C(value) (TCC_FCTRLA_SRC_Msk & (_UINT32_(value) << TCC_FCTRLA_SRC_Pos)) /* Assignm…
255 #define TCC_FCTRLA_SRC_DISABLE (TCC_FCTRLA_SRC_DISABLE_Val << TCC_FCTRLA_SRC_Pos) …
256 #define TCC_FCTRLA_SRC_ENABLE (TCC_FCTRLA_SRC_ENABLE_Val << TCC_FCTRLA_SRC_Pos) …
257 #define TCC_FCTRLA_SRC_INVERT (TCC_FCTRLA_SRC_INVERT_Val << TCC_FCTRLA_SRC_Pos) …
258 #define TCC_FCTRLA_SRC_ALTFAULT (TCC_FCTRLA_SRC_ALTFAULT_Val << TCC_FCTRLA_SRC_Pos) …
/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg61/component/
Dtcc.h248 #define TCC_FCTRLA_SRC_Pos _UINT32_(0) … macro
249 #define TCC_FCTRLA_SRC_Msk (_UINT32_(0x3) << TCC_FCTRLA_SRC_Pos) …
250 …C(value) (TCC_FCTRLA_SRC_Msk & (_UINT32_(value) << TCC_FCTRLA_SRC_Pos)) /* Assigme…
255 #define TCC_FCTRLA_SRC_DISABLE (TCC_FCTRLA_SRC_DISABLE_Val << TCC_FCTRLA_SRC_Pos) …
256 #define TCC_FCTRLA_SRC_ENABLE (TCC_FCTRLA_SRC_ENABLE_Val << TCC_FCTRLA_SRC_Pos) …
257 #define TCC_FCTRLA_SRC_INVERT (TCC_FCTRLA_SRC_INVERT_Val << TCC_FCTRLA_SRC_Pos) …
258 #define TCC_FCTRLA_SRC_ALTFAULT (TCC_FCTRLA_SRC_ALTFAULT_Val << TCC_FCTRLA_SRC_Pos) …
/hal_microchip-latest/pic32c/pic32cxsg/include/pic32cxsg60/component/
Dtcc.h248 #define TCC_FCTRLA_SRC_Pos _UINT32_(0) … macro
249 #define TCC_FCTRLA_SRC_Msk (_UINT32_(0x3) << TCC_FCTRLA_SRC_Pos) …
250 …C(value) (TCC_FCTRLA_SRC_Msk & (_UINT32_(value) << TCC_FCTRLA_SRC_Pos)) /* Assigme…
255 #define TCC_FCTRLA_SRC_DISABLE (TCC_FCTRLA_SRC_DISABLE_Val << TCC_FCTRLA_SRC_Pos) …
256 #define TCC_FCTRLA_SRC_ENABLE (TCC_FCTRLA_SRC_ENABLE_Val << TCC_FCTRLA_SRC_Pos) …
257 #define TCC_FCTRLA_SRC_INVERT (TCC_FCTRLA_SRC_INVERT_Val << TCC_FCTRLA_SRC_Pos) …
258 #define TCC_FCTRLA_SRC_ALTFAULT (TCC_FCTRLA_SRC_ALTFAULT_Val << TCC_FCTRLA_SRC_Pos) …