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Searched refs:SRS11_SEL_FREQ_BASE_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_microchip-latest/mpfs/drivers/mss/mss_mmc/
Dmss_mmc_regs.h296 #define SRS11_SEL_FREQ_BASE_MASK (0x0000FF00u | 0x000000C0u) macro
Dmss_mmc.c5059 temp &= ~(uint32_t)SRS11_SEL_FREQ_BASE_MASK; in set_host_sdclk()