Searched refs:QSPI (Results 1 – 2 of 2) sorted by relevance
36 QSPI->CONTROL = CTRL_EN_MASK | in MSS_QSPI_init()40 QSPI->INTENABLE = 0x0u; in MSS_QSPI_init()51 QSPI->CONTROL = (uint32_t)(config->sample << CTRL_SAMPLE) | in MSS_QSPI_configure()70 reg = QSPI->CONTROL; in MSS_QSPI_get_config()109 QSPI->INTENABLE = 0u; in MSS_QSPI_polled_transfer_block()111 while ((QSPI->STATUS & STTS_READY_MASK) == 0u){}; in MSS_QSPI_polled_transfer_block()115 QSPI->FRAMESUP = total_byte_cnt & QSPI_BYTESUPPER_MASK; in MSS_QSPI_polled_transfer_block()121 skips |= (((QSPI->CONTROL & CTRL_QMODE12_MASK)? 1u:0u) << FRMS_QSPI); in MSS_QSPI_polled_transfer_block()125 QSPI->FRAMES = (uint32_t)skips; in MSS_QSPI_polled_transfer_block()127 QSPI->CONTROL |= CTRL_FLAGSX4_MASK; in MSS_QSPI_polled_transfer_block()[all …]
397 #define QSPI ((QSPI_TypeDef *) QSPI_BASE) macro443 QSPI->CONTROL |= CTRL_EN_MASK; in MSS_QSPI_enable()461 QSPI->CONTROL &= ~CTRL_EN_MASK; in MSS_QSPI_disable()692 return(QSPI->DIRECT); in MSS_QSPI_read_direct_access_reg()713 QSPI->DIRECT = value; in MSS_QSPI_write_direct_access_reg()734 return(QSPI->STATUS); in MSS_QSPI_read_status()
