Lines Matching refs:QSPI
36 QSPI->CONTROL = CTRL_EN_MASK | in MSS_QSPI_init()
40 QSPI->INTENABLE = 0x0u; in MSS_QSPI_init()
51 QSPI->CONTROL = (uint32_t)(config->sample << CTRL_SAMPLE) | in MSS_QSPI_configure()
70 reg = QSPI->CONTROL; in MSS_QSPI_get_config()
109 QSPI->INTENABLE = 0u; in MSS_QSPI_polled_transfer_block()
111 while ((QSPI->STATUS & STTS_READY_MASK) == 0u){}; in MSS_QSPI_polled_transfer_block()
115 QSPI->FRAMESUP = total_byte_cnt & QSPI_BYTESUPPER_MASK; in MSS_QSPI_polled_transfer_block()
121 skips |= (((QSPI->CONTROL & CTRL_QMODE12_MASK)? 1u:0u) << FRMS_QSPI); in MSS_QSPI_polled_transfer_block()
125 QSPI->FRAMES = (uint32_t)skips; in MSS_QSPI_polled_transfer_block()
127 QSPI->CONTROL |= CTRL_FLAGSX4_MASK; in MSS_QSPI_polled_transfer_block()
133 while (QSPI->STATUS & STTS_TFFULL_MASK){}; in MSS_QSPI_polled_transfer_block()
135 QSPI->TXDATAX4 = (uint32_t)buf32[idx]; in MSS_QSPI_polled_transfer_block()
138 QSPI->CONTROL &= ~CTRL_FLAGSX4_MASK; in MSS_QSPI_polled_transfer_block()
142 while (QSPI->STATUS & STTS_TFFULL_MASK){}; in MSS_QSPI_polled_transfer_block()
144 QSPI->TXDATAX1 = (uint8_t)buf8[idx]; in MSS_QSPI_polled_transfer_block()
154 QSPI->CONTROL |= CTRL_FLAGSX4_MASK; in MSS_QSPI_polled_transfer_block()
158 while (QSPI->STATUS & STTS_RFEMPTY_MASK){}; in MSS_QSPI_polled_transfer_block()
159 buf32[idx] = QSPI->RXDATAX4; in MSS_QSPI_polled_transfer_block()
162 QSPI->CONTROL &= ~CTRL_FLAGSX4_MASK; in MSS_QSPI_polled_transfer_block()
167 while (QSPI->STATUS & STTS_RFEMPTY_MASK){}; in MSS_QSPI_polled_transfer_block()
168 buf8[idx] = QSPI->RXDATAX1; in MSS_QSPI_polled_transfer_block()
171 while (0u == (QSPI->STATUS & STTS_RDONE_MASK)) in MSS_QSPI_polled_transfer_block()
173 skips = (uint64_t)((QSPI->STATUS & STTS_FLAGSX4_MASK) ? in MSS_QSPI_polled_transfer_block()
174 QSPI->RXDATAX4 : QSPI->RXDATAX1); in MSS_QSPI_polled_transfer_block()
205 if ((QSPI->STATUS & STTS_READY_MASK) == 0u) in MSS_QSPI_irq_transfer_block()
218 QSPI->FRAMESUP = total_byte_cnt & QSPI_BYTESUPPER_MASK; in MSS_QSPI_irq_transfer_block()
223 skips |= (((QSPI->CONTROL & CTRL_QMODE12_MASK)? 1u:0u) << FRMS_QSPI); in MSS_QSPI_irq_transfer_block()
227 QSPI->FRAMES = skips; in MSS_QSPI_irq_transfer_block()
229 QSPI->CONTROL |= CTRL_FLAGSX4_MASK; in MSS_QSPI_irq_transfer_block()
236 QSPI->CONTROL |= CTRL_FLAGSX4_MASK; in MSS_QSPI_irq_transfer_block()
246 while (QSPI->STATUS & STTS_TFFULL_MASK){}; in MSS_QSPI_irq_transfer_block()
248 QSPI->TXDATAX4 = (uint32_t)buf32[idx]; in MSS_QSPI_irq_transfer_block()
251 QSPI->CONTROL &= ~CTRL_FLAGSX4_MASK; in MSS_QSPI_irq_transfer_block()
255 while (QSPI->STATUS & STTS_TFFULL_MASK){}; in MSS_QSPI_irq_transfer_block()
257 QSPI->TXDATAX1 = (uint8_t)buf8[idx]; in MSS_QSPI_irq_transfer_block()
260 QSPI->INTENABLE = enable; in MSS_QSPI_irq_transfer_block()
288 status = QSPI->STATUS; in qspi_isr()
293 QSPI->STATUS |= STTS_TDONE_MASK; in qspi_isr()
306 QSPI->CONTROL |= CTRL_FLAGSX4_MASK; in qspi_isr()
312 buf32[idx] = QSPI->RXDATAX4; in qspi_isr()
315 QSPI->CONTROL &= ~CTRL_FLAGSX4_MASK; in qspi_isr()
322 buf8[idx] = QSPI->RXDATAX1; in qspi_isr()
327 while (0u == (QSPI->STATUS & STTS_RFEMPTY_MASK)) in qspi_isr()
332 skips = (uint32_t)((QSPI->STATUS & STTS_FLAGSX4_MASK) ? in qspi_isr()
333 QSPI->RXDATAX4 : QSPI->RXDATAX1); in qspi_isr()
347 QSPI->INTENABLE &= ~(INTE_RDONE_MASK | INTE_RAVLB_MASK); in qspi_isr()
348 QSPI->STATUS |= STTS_RDONE_MASK; in qspi_isr()