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Searched refs:MEC_PCR (Results 1 – 8 of 8) sorted by relevance

/hal_microchip-latest/mec5/drivers/
Dmec_pcr.c35 if (MEC_PCR->PRS & MEC_BIT(MEC_PCR_PRS_RESET_VCC_Pos)) { in mec_hal_pcr_is_host_reset()
43 if (MEC_PCR->PRS & MEC_BIT(MEC_PCR_PRS_VCC_PWRGD_Pos)) { in mec_hal_pcr_is_vcc_pwrgd()
52 return (MEC_PCR->PRS >> 1) & 0x03u; in mec_hal_pcr_vcc_power_good_state()
58 if (MEC_PCR->TURBO_CLK & MEC_BIT(MEC_PCR_TURBO_CLK_FAST_CLK_Pos)) { in mec_hal_pcr_is_turbo_clock()
78 if (MEC_PCR->TURBO_CLK & MEC_BIT(MEC_PCR_TURBO_CLK_FAST_CLK_Pos)) { in mec_hal_pcr_cpu_max_freq()
97 uint32_t clkdiv = MEC_PCR->PCC; in mec_hal_pcr_cpu_clk_speed()
113 MEC_PCR->PCC = clkdiv; in set_pcr_cpu_clk_div()
164 return MEC_PCR->PCC; in mec_hal_pcr_cpu_clock_divider()
180 if (MEC_PCR->OID & MEC_BIT(MEC_PCR_OID_PLL_LOCK_Pos)) { in mec_hal_pcr_is_pll_locked()
201 MEC_PCR->SLP_EN[idx] |= MEC_BIT(bpos); in mec_hal_pcr_set_blk_slp_en()
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Dmec_pcr_api.h177 MEC_PCR->SSC = 0; in mec_hal_pcr_sleep_disable()
185 MEC_PCR->SSC = MEC_BIT(MEC_PCR_SSC_SLPALL_Pos); in mec_hal_pcr_lite_sleep()
191 MEC_PCR->SSC = MEC_BIT(MEC_PCR_SSC_DEEPSLP_Pos) | MEC_BIT(MEC_PCR_SSC_SLPALL_Pos); in mec_hal_pcr_deep_sleep()
/hal_microchip-latest/mec5/devices/MEC174X/
Dmec1743_qsz.h494 #define MEC_PCR ((MEC_PCR_Type*) MEC_PCR_BASE) macro
Dmec1743_qlj.h502 #define MEC_PCR ((MEC_PCR_Type*) MEC_PCR_BASE) macro
/hal_microchip-latest/mec5/devices/MECH172X/
Dmech1723_nlj.h494 #define MEC_PCR ((MEC_PCR_Type*) MEC_PCR_BASE) macro
Dmech1723_nsz.h488 #define MEC_PCR ((MEC_PCR_Type*) MEC_PCR_BASE) macro
/hal_microchip-latest/mec5/devices/MEC175X/
Dmec1753_qlj.h521 #define MEC_PCR ((MEC_PCR_Type*) MEC_PCR_BASE) macro
Dmec1753_qsz.h514 #define MEC_PCR ((MEC_PCR_Type*) MEC_PCR_BASE) macro