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Searched refs:ulConfig (Results 1 – 1 of 1) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_ephy.c126 uint32_t ulConfig; in Cy_EPHY_Reset() local
134 phy->fnPhyRead( phyAddress, PHYREG_00_BMCR, &ulConfig ); in Cy_EPHY_Reset()
135 phy->fnPhyWrite( phyAddress, PHYREG_00_BMCR, ( ulConfig | PHYBMCR_RESET_Msk ) ); in Cy_EPHY_Reset()
139 phy->fnPhyRead( phyAddress, PHYREG_00_BMCR, &ulConfig ); in Cy_EPHY_Reset()
140 if(_FLD2VAL(PHYBMCR_RESET, ulConfig) == 0UL) in Cy_EPHY_Reset()
148 phy->fnPhyRead( phyAddress, PHYREG_00_BMCR, &ulConfig ); in Cy_EPHY_Reset()
149 phy->fnPhyWrite( phyAddress, PHYREG_00_BMCR, ( ulConfig & ( ~PHYBMCR_RESET_Msk ) ) ); in Cy_EPHY_Reset()
178 uint32_t ulConfig, reg, bmsr; in Cy_EPHY_Configure() local
186 phy->fnPhyRead( phyAddress, PHYREG_00_BMCR, &ulConfig ); in Cy_EPHY_Configure()
195 ulConfig |= PHYBMCR_AN_ENABLE_Msk; in Cy_EPHY_Configure()
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