| /hal_infineon-latest/mtb-pdl-cat1/drivers/source/ |
| D | cy_efuse_v3.c | 136 cy_en_efuse_status_t Cy_EFUSE_WriteBit(EFUSE_Type *base, uint32_t bitPos, uint32_t offset) in Cy_EFUSE_WriteBit() argument 138 if((offset > EFUSE_SIZE) || (bitPos > CY_EFUSE_BITS_PER_BYTE)) in Cy_EFUSE_WriteBit() 157 uint32_t byteAddr = offset / EFUSE_MACRO_NUM; in Cy_EFUSE_WriteBit() 158 uint32_t macroAddr = offset % EFUSE_MACRO_NUM; in Cy_EFUSE_WriteBit() 184 (void)Cy_EFUSE_ReadByte(base, &readByte, offset); in Cy_EFUSE_WriteBit() 199 cy_en_efuse_status_t Cy_EFUSE_WriteByte(EFUSE_Type *base, uint32_t src, uint32_t offset) in Cy_EFUSE_WriteByte() argument 203 if ((offset < EFUSE_SIZE) && (src <= 0xFFUL)) in Cy_EFUSE_WriteByte() 209 (void)Cy_EFUSE_ReadByte(base, &readByte, offset); in Cy_EFUSE_WriteByte() 217 ret = Cy_EFUSE_WriteBit(base, bitPos, offset); in Cy_EFUSE_WriteByte() 234 cy_en_efuse_status_t Cy_EFUSE_WriteWord(EFUSE_Type *base, uint32_t src, uint32_t offset) in Cy_EFUSE_WriteWord() argument [all …]
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| D | cy_efuse.c | 61 uint32_t offset = bitNum / CY_EFUSE_BITS_PER_BYTE; in Cy_EFUSE_GetEfuseBit() local 66 result = Cy_EFUSE_GetEfuseByte(offset, &byteVal); in Cy_EFUSE_GetEfuseBit() 78 cy_en_efuse_status_t Cy_EFUSE_GetEfuseByte(uint32_t offset, uint8_t *byteVal) in Cy_EFUSE_GetEfuseByte() argument 86 opcode = CY_EFUSE_OPCODE_READ_FUSE_BYTE | (offset << CY_EFUSE_OPCODE_OFFSET_Pos); in Cy_EFUSE_GetEfuseByte()
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| D | cy_sar2.c | 354 base->DIG_CAL = (_VAL2FLD(PASS_SAR_DIG_CAL_DOFFSET, digCalibConfig->offset) | in Cy_SAR2_SetDigitalCalibrationValue() 387 digCalibConfig->offset = (uint16_t) _FLD2VAL(PASS_SAR_DIG_CAL_DOFFSET, digCal); in Cy_SAR2_GetDigitalCalibrationValue() 422 base->DIG_CAL_ALT = (_VAL2FLD(PASS_SAR_DIG_CAL_ALT_DOFFSET, altDigCalibConfig->offset) | in Cy_SAR2_SetAltDigitalCalibrationValue() 458 altDigCalibConfig->offset = (uint16_t) _FLD2VAL(PASS_SAR_DIG_CAL_ALT_DOFFSET, digCalAlt); in Cy_SAR2_GetAltDigitalCalibrationValue() 493 base->ANA_CAL = (_VAL2FLD(PASS_SAR_ANA_CAL_AOFFSET, analogCalibConfig->offset) | in Cy_SAR2_SetAnalogCalibrationValue() 529 analogCalibConfig->offset = (int8_t) _FLD2VAL(PASS_SAR_ANA_CAL_AOFFSET, anaCal); in Cy_SAR2_GetAnalogCalibrationValue() 564 base->ANA_CAL_ALT = (_VAL2FLD(PASS_SAR_ANA_CAL_ALT_AOFFSET, altAnalogCalibConfig->offset) | in Cy_SAR2_SetAltAnalogCalibrationValue() 600 altAnalogCalibConfig->offset = (int8_t) _FLD2VAL(PASS_SAR_ANA_CAL_AOFFSET, altAnaCal); in Cy_SAR2_GetAltAnalogCalibrationValue()
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| D | cy_cryptolite_hkdf.c | 151 uint32_t offset=0u; in Cy_Cryptolite_Hkdf_Expand() local 222 bytesCopy = okmLength - offset; in Cy_Cryptolite_Hkdf_Expand() 225 status = Cy_Cryptolite_Memcpy(base, (okm + offset), t, bytesCopy); in Cy_Cryptolite_Hkdf_Expand() 231 offset += hashlen; in Cy_Cryptolite_Hkdf_Expand()
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| D | cy_crypto_core_hkdf_v2.c | 204 uint32_t offset=0u; in Cy_Crypto_Core_V2_Hkdf_Expand() local 294 bytesCopy = okmLength - offset; in Cy_Crypto_Core_V2_Hkdf_Expand() 297 Cy_Crypto_Core_V2_MemCpy(base, (void*)(okm + offset), (void *)t, (uint16_t)bytesCopy); in Cy_Crypto_Core_V2_Hkdf_Expand() 298 offset += hashlen; in Cy_Crypto_Core_V2_Hkdf_Expand()
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| D | cy_adcmic.c | 394 void Cy_ADCMic_SetDcOffset(int16_t offset, cy_stc_adcmic_context_t * context) in Cy_ADCMic_SetDcOffset() argument 398 context->offset = offset; in Cy_ADCMic_SetDcOffset() 412 …return ((int32_t)(((int64_t)adcCounts - (int64_t)context->offset) * CY_ADCMIC_UV / (int64_t)contex… in Cy_ADCMic_CountsTo_uVolts() 417 …return ((int16_t)(((int32_t)adcCounts - (int32_t)context->offset) * CY_ADCMIC_MV / (int32_t)contex… in Cy_ADCMic_CountsTo_mVolts() 422 return (((float)adcCounts - (float)context->offset) / (float)context->gain); in Cy_ADCMic_CountsTo_Volts()
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| /hal_infineon-latest/mtb-pdl-cat1/drivers/include/ |
| D | cy_csd.h | 702 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset); 703 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value); 704 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask); 705 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask); 706 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type* base, uint32_t offset, uint32_t mask, uint32_t valu… 725 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset) in Cy_CSD_ReadReg() argument 727 return(* (volatile uint32_t *)((uint32_t)base + offset)); in Cy_CSD_ReadReg() 747 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value) in Cy_CSD_WriteReg() argument 749 (* (volatile uint32_t *)((uint32_t)base + offset)) = value; in Cy_CSD_WriteReg() 770 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask) in Cy_CSD_SetBits() argument [all …]
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| D | cy_efuse.h | 283 cy_en_efuse_status_t Cy_EFUSE_GetEfuseByte(uint32_t offset, uint8_t *byteVal); 429 cy_en_efuse_status_t Cy_EFUSE_WriteBit(EFUSE_Type *base, uint32_t bitPos, uint32_t offset); 458 cy_en_efuse_status_t Cy_EFUSE_WriteByte(EFUSE_Type *base, uint32_t src, uint32_t offset); 488 cy_en_efuse_status_t Cy_EFUSE_WriteWord(EFUSE_Type *base, uint32_t src, uint32_t offset); 523 cy_en_efuse_status_t Cy_EFUSE_WriteWordArray(EFUSE_Type *base, const uint32_t *src, uint32_t offset… 553 …_efuse_status_t Cy_EFUSE_ReadBit(EFUSE_Type *base, uint8_t *dst, uint32_t bitPos, uint32_t offset); 580 cy_en_efuse_status_t Cy_EFUSE_ReadByte(EFUSE_Type *base, uint8_t *dst, uint32_t offset); 608 cy_en_efuse_status_t Cy_EFUSE_ReadWord(EFUSE_Type *base, uint32_t *dst, uint32_t offset); 639 cy_en_efuse_status_t Cy_EFUSE_ReadWordArray(EFUSE_Type *base, uint32_t *dst, uint32_t offset, uint3…
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| D | cy_crypto_core_hw_v2.h | 309 __STATIC_INLINE void Cy_Crypto_Core_V2_RBXor(CRYPTO_Type *base, uint32_t offset, uint32_t size) in Cy_Crypto_Core_V2_RBXor() argument 317 (offset << CY_CRYPTO_RSRC8_SHIFT) | in Cy_Crypto_Core_V2_RBXor() 321 __STATIC_INLINE void Cy_Crypto_Core_V2_RBStore(CRYPTO_Type *base, uint32_t offset, uint32_t size) in Cy_Crypto_Core_V2_RBStore() argument 329 (offset << CY_CRYPTO_RSRC8_SHIFT) | in Cy_Crypto_Core_V2_RBStore() 332 __STATIC_INLINE void Cy_Crypto_Core_V2_RBSetByte(CRYPTO_Type *base, uint32_t offset, uint8_t byte) in Cy_Crypto_Core_V2_RBSetByte() argument 340 (offset << CY_CRYPTO_RSRC8_SHIFT) | in Cy_Crypto_Core_V2_RBSetByte()
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| D | cy_adcmic.h | 634 int16_t offset; /**< The storage for the offset calibration value */ member 992 void Cy_ADCMic_SetDcOffset(int16_t offset, cy_stc_adcmic_context_t * context);
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| /hal_infineon-latest/wifi-host-driver/WiFi_Host_Driver/resources/resource_imp/ |
| D | whd_resources.c | 67 resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset, uint32_t maxsize, … 70 uint32_t offset, uint32_t size, uint32_t *size_out, void *buffer); 95 resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset, uint32_t maxsize, … in resource_read() argument 98 if (offset > resource->size) in resource_read() 103 *size = MIN(maxsize, resource->size - offset); in resource_read() 107 memcpy(buffer, &resource->val.mem.data[offset], *size); in resource_read() 112 return platform_read_external_resource(resource, offset, maxsize, size, buffer); in resource_read() 127 …WICED_SUCCESS != wiced_filesystem_file_seek (&file_handle, (offset + resource->val.fs.offset), SEE… in resource_read() 150 if (0 != wicedfs_fseek(&file_hnd, (long)(offset + resource->val.fs.offset), SEEK_SET) ) in resource_read() 319 uint32_t offset, uint32_t size, uint32_t *size_out, void *buffer) in host_resource_read() argument [all …]
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| D | wiced_resource.h | 135 unsigned long offset; /**< Offset to the start of the resource */ member 199 extern resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset, uint32_t ma… 212 …t_t resource_get_readonly_buffer(const resource_hnd_t *resource, uint32_t offset, uint32_t maxsize,
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| /hal_infineon-latest/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/ |
| D | whd_chip_reg.h | 34 #define D11REG_ADDR(offset) (D11_BASE_ADDR + offset) argument 35 #define D11IHR_ADDR(offset) (D11_AXI_BASE_ADDR + 0x400 + (2 * offset) ) argument 36 #define D11SHM_ADDR(offset) (D11_SHM_BASE_ADDR + offset) argument
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| /hal_infineon-latest/btstack-integration/COMPONENT_BTSS-IPC/platform/common/ |
| D | cybt_prm.c | 291 uint32_t len, offset = cybt_prm_cb.tx_patch_length; in cybt_prm_send_next_patch() local 296 p = (uint8_t *)(cybt_prm_cb.p_patch_data + offset); in cybt_prm_send_next_patch() 323 write_ram_vsc[0] = (cybt_prm_cb.dest_ram + offset) & 0xFF; in cybt_prm_send_next_patch() 324 write_ram_vsc[1] = ((cybt_prm_cb.dest_ram + offset) >> 8) & 0xFF; in cybt_prm_send_next_patch() 325 write_ram_vsc[2] = ((cybt_prm_cb.dest_ram + offset) >> 16) & 0xFF; in cybt_prm_send_next_patch() 326 write_ram_vsc[3] = ((cybt_prm_cb.dest_ram + offset) >> 24) & 0xFF; in cybt_prm_send_next_patch() 328 memcpy(write_ram_vsc + 4, cybt_prm_cb.p_patch_data + offset, len); in cybt_prm_send_next_patch()
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| /hal_infineon-latest/XMCLib/drivers/src/ |
| D | xmc_ccu4.c | 780 uint8_t offset; in XMC_CCU4_SLICE_ConfigureEvent() local 793 offset = ((uint8_t) event) - 1U; in XMC_CCU4_SLICE_ConfigureEvent() 799 pos = ((uint8_t) CCU4_CC4_INS2_EV0EM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent() 804 pos = ((uint8_t) CCU4_CC4_INS2_EV0LM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent() 809 pos = ((uint8_t) CCU4_CC4_INS2_LPF0M_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent() 818 pos = ((uint8_t) CCU4_CC4_INS1_EV0IS_Pos) + (uint8_t)(offset << 3U); in XMC_CCU4_SLICE_ConfigureEvent() 828 pos = ((uint8_t) CCU4_CC4_INS_EV0EM_Pos) + (uint8_t)(offset << 1U); in XMC_CCU4_SLICE_ConfigureEvent() 833 pos = ((uint8_t) CCU4_CC4_INS_EV0LM_Pos) + offset; in XMC_CCU4_SLICE_ConfigureEvent() 838 pos = ((uint8_t) CCU4_CC4_INS_LPF0M_Pos) + (uint8_t)(offset << 1U); in XMC_CCU4_SLICE_ConfigureEvent() 843 pos = ((uint8_t) CCU4_CC4_INS_EV0IS_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent() [all …]
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| D | xmc_ccu8.c | 827 uint8_t offset; in XMC_CCU8_SLICE_ConfigureEvent() local 841 offset = ((uint8_t) event) - 1U; in XMC_CCU8_SLICE_ConfigureEvent() 847 pos = ((uint8_t) CCU8_CC8_INS2_EV0EM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent() 852 pos = ((uint8_t) CCU8_CC8_INS2_EV0LM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent() 857 pos = ((uint8_t) CCU8_CC8_INS2_LPF0M_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent() 866 pos = ((uint8_t) CCU8_CC8_INS1_EV0IS_Pos) + (uint8_t)(offset << 3U); in XMC_CCU8_SLICE_ConfigureEvent() 876 pos = ((uint8_t) CCU8_CC8_INS_EV0EM_Pos) + (uint8_t)(offset << 1U); in XMC_CCU8_SLICE_ConfigureEvent() 881 pos = ((uint8_t) CCU8_CC8_INS_EV0LM_Pos) + offset; in XMC_CCU8_SLICE_ConfigureEvent() 886 pos = ((uint8_t) CCU8_CC8_INS_LPF0M_Pos) + (uint8_t)(offset << 1U); in XMC_CCU8_SLICE_ConfigureEvent() 891 pos = ((uint8_t) CCU8_CC8_INS_EV0IS_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent() [all …]
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| D | xmc1_scu.c | 819 int32_t offset; in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature() local 826 offset = b + (((a - b) * (temperature - d)) / (e - d)); in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature() 827 offset &= SCU_ANALOG_ANAOFFSET_ADJL_OFFSET_Msk; in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature() 830 SCU_ANALOG->ANAOFFSET = (uint16_t)offset; in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature()
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| /hal_infineon-latest/mtb-hal-cat1/source/ |
| D | cyhal_irq_impl.c | 74 uint8_t offset = bit - start_bit; in _cyhal_system_irq_lookup_priority() local 76 result |= (bit_value << offset); in _cyhal_system_irq_lookup_priority() 89 uint8_t offset = bit - start_bit; in _cyhal_system_irq_store_priority() local 90 uint8_t bit_value = priority & (1u << offset); in _cyhal_system_irq_store_priority()
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| D | cyhal_lptimer.c | 566 obj->offset = 0; in cyhal_lptimer_init() 654 obj->offset = Cy_MCWDT_GetCount(obj->base, CY_MCWDT_COUNTER2); in cyhal_lptimer_reload() 674 obj->final_time = ticks + obj->offset; in cyhal_lptimer_set_match() 692 if(obj->offset > ctr2_count) in cyhal_lptimer_read() 694 return (uint32_t)((((uint64_t)1 << 32) - obj->offset) + ctr2_count); in cyhal_lptimer_read() 698 return ctr2_count - obj->offset; in cyhal_lptimer_read()
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| D | cyhal_qspi.c | 601 …cyhal_qspi_get_dataselect(cyhal_gpio_t io0, cy_en_smif_data_select_t *data_select, uint8_t *offset) in _cyhal_qspi_get_dataselect() argument 609 *offset = 0; in _cyhal_qspi_get_dataselect() 618 *offset = 2; in _cyhal_qspi_get_dataselect() 629 *offset = 4; in _cyhal_qspi_get_dataselect() 639 *offset = 6; in _cyhal_qspi_get_dataselect()
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| /hal_infineon-latest/btstack/wiced_include/ |
| D | wiced_bt_gatt.h | 252 uint16_t offset; /**< Offset to read */ member 293 …uint16_t offset; /**< Attribute value offset, ignored if no… member 302 uint16_t offset; /**< Offset to write */ member 360 uint16_t offset; /**< offset */ member 1345 uint16_t handle, uint16_t offset, 1513 uint16_t offset,
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| /hal_infineon-latest/wifi-host-driver/WiFi_Host_Driver/src/ |
| D | whd_resource_if.c | 104 uint32_t whd_resource_read(whd_driver_t whd_driver, whd_resource_type_t type, uint32_t offset, in whd_resource_read() argument 109 …return whd_driver->resource_if->whd_resource_read(whd_driver, type, offset, size, size_out, buffer… in whd_resource_read()
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| D | whd_chip_constants.c | 141 uint32_t offset = 0; in get_socsram_base_address() local 144 offset = WRAPPER_REGISTER_OFFSET; in get_socsram_base_address() 151 *addr = 0x18004000 + offset; in get_socsram_base_address()
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| /hal_infineon-latest/XMCLib/drivers/inc/ |
| D | xmc_dsd.h | 416 …int16_t offset; /**< Offset subtracted from result.This parameter can take a value of int16_t */ member 918 …ATIC_INLINE void XMC_DSD_CH_MainFilter_SetOffset(XMC_DSD_CH_t *const channel, const int16_t offset) in XMC_DSD_CH_MainFilter_SetOffset() argument 921 channel->OFFM = (uint32_t)offset; in XMC_DSD_CH_MainFilter_SetOffset()
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| /hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ |
| D | cy_device.h | 456 uint32_t remapAddr, offset; in Cy_Platform_RemapAddr() local 463 offset = (uint32_t)addr - CY_FLASH_S_SBUS_BASE; in Cy_Platform_RemapAddr() 464 remapAddr = CY_FLASH_S_CBUS_BASE + offset; in Cy_Platform_RemapAddr() 470 offset = (uint32_t)addr - CY_SFLASH_S_SBUS_BASE; in Cy_Platform_RemapAddr() 471 remapAddr = CY_SFLASH_S_CBUS_BASE + offset; in Cy_Platform_RemapAddr() 477 offset = (uint32_t)addr - CY_SRAM0_S_CBUS_BASE; in Cy_Platform_RemapAddr() 478 remapAddr = CY_SRAM0_S_SBUS_BASE + offset; in Cy_Platform_RemapAddr() 485 offset = (uint32_t)addr - CY_FLASH_NS_SBUS_BASE; in Cy_Platform_RemapAddr() 486 remapAddr = CY_FLASH_NS_CBUS_BASE + offset; in Cy_Platform_RemapAddr() 492 offset = (uint32_t)addr - CY_SFLASH_NS_SBUS_BASE; in Cy_Platform_RemapAddr() [all …]
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