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Searched refs:blellDivider (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/bless/
Dcy_ble_clk.c799 uint16_t blellDivider = 0U; in Cy_BLE_HAL_MxdRadioEnableClocks() local
818 blellDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_4 - blerdDivider; in Cy_BLE_HAL_MxdRadioEnableClocks()
835 blellDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_2 - blerdDivider; in Cy_BLE_HAL_MxdRadioEnableClocks()
852 temp |= (uint16_t)(blellDivider << BLE_BLESS_XTAL_CLK_DIV_CONFIG_LLCLK_DIV_Pos); in Cy_BLE_HAL_MxdRadioEnableClocks()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_ble_clk.c809 uint16_t blellDivider = 0U; in Cy_BLE_HAL_MxdRadioEnableClocks() local
828 blellDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_4 - blerdDivider; in Cy_BLE_HAL_MxdRadioEnableClocks()
845 blellDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_2 - blerdDivider; in Cy_BLE_HAL_MxdRadioEnableClocks()
862 temp |= (uint16_t)(blellDivider << BLE_BLESS_XTAL_CLK_DIV_CONFIG_LLCLK_DIV_Pos); in Cy_BLE_HAL_MxdRadioEnableClocks()