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Searched refs:P2_4_TCPWM1_LINE5 (Results 1 – 6 of 6) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dgpio_psoc6_03_49_wlcsp.h377 P2_4_TCPWM1_LINE5 = 9, /* Digital Active - tcpwm[1].line[5]:0 */ enumerator
Dgpio_psoc6_03_68_qfn.h494 P2_4_TCPWM1_LINE5 = 9, /* Digital Active - tcpwm[1].line[5]:0 */ enumerator
Dgpio_psoc6_03_100_tqfp.h536 P2_4_TCPWM1_LINE5 = 9, /* Digital Active - tcpwm[1].line[5]:0 */ enumerator
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.c434 {1u, 5u, P2_4, P2_4_TCPWM1_LINE5},
Dcyhal_psoc6_03_68_qfn.c483 {1u, 5u, P2_4, P2_4_TCPWM1_LINE5},
Dcyhal_psoc6_03_100_tqfp.c516 {1u, 5u, P2_4, P2_4_TCPWM1_LINE5},