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Searched refs:OUT_SET (Results 1 – 10 of 10) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_gpio_v3.h45 __IOM uint32_t OUT_SET; /*!< 0x00000008 Port output data set register */ member
Dcyip_gpio_v5.h45 __IOM uint32_t OUT_SET; /*!< 0x00000008 Port output data set register */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_gpio.h45 __IOM uint32_t OUT_SET; /*!< 0x00000008 Port output data set register */ member
Dcyip_gpio_v2.h45 __IOM uint32_t OUT_SET; /*!< 0x00000008 Port output data set register */ member
Dcyip_gpio_v5.h45 __IOM uint32_t OUT_SET; /*!< 0x00000008 Port output data set register */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_gpio.h45 __IOM uint32_t OUT_SET; /*!< 0x00000008 Port output data set register */ member
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_pra.c299 …regPolicy[index + CY_SYSLIB_DIV_ROUND(offsetof(GPIO_PRT_Type, OUT_SET), 4U)].writeMask = (CY_GPIO_… in Cy_PRA_InitGpioPort()
2690 … retIndex = portIndex + CY_SYSLIB_DIV_ROUND(offsetof(GPIO_PRT_Type, OUT_SET), 4U); in Cy_PRA_GetPortRegIndex()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1447 #define GPIO_PRT_OUT_SET(base) (((GPIO_PRT_Type*)(base))->OUT_SET)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1981 #define GPIO_PRT_OUT_SET(base) (((GPIO_PRT_Type*)(base))->OUT_SET)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h559 #define GPIO_PRT_OUT_SET(base) (((GPIO_PRT_Type*)(base))->OUT_SET)