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Searched refs:NORMAL_INT_STAT_R (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_sdhc.h71 __IOM uint16_t NORMAL_INT_STAT_R; /*!< 0x00000030 Normal Interrupt Status Register */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_sdhc.h71 __IOM uint16_t NORMAL_INT_STAT_R; /*!< 0x00000030 Normal Interrupt Status Register */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1065 #define SDHC_CORE_NORMAL_INT_STAT_R(base) (((SDHC_V1_Type *)(base))->CORE.NORMAL_INT_STAT_R)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h921 #define SDHC_CORE_NORMAL_INT_STAT_R(base) (((SDHC_Type *)(base))->CORE.NORMAL_INT_STAT_R)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h139 #define SDHC_CORE_NORMAL_INT_STAT_R(base) (((SDHC_Type *)(base))->CORE.NORMAL_INT_STAT_R)