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Searched refs:MS (Results 1 – 13 of 13) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_ms_ctl_1_2.h61 MS_Type MS[32]; /*!< 0x00000000 Master protection context control */ member
/hal_infineon-latest/XMCLib/drivers/src/
Dxmc_usbh.c1493 __WEAK uint8_t XMC_USBH_osDelay(uint32_t MS) in XMC_USBH_osDelay() argument
1495 (void)MS; in XMC_USBH_osDelay()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829b0000.h718 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw20829b0010.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw20829b0021.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw89829a0kml.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw89829b0022.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw89829b01mksbg.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw89829b0232.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw89829b0kml.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw20829b0kml.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcyw20829b0lkml.h721 #define MS5 ((MS_Type*) &MS_CTL_1_2->MS[5]) …
Dcy_device.h2425 #define MS_CTL_PC_CTL_VX(index) (((MS_CTL_2_1_Type*) MS_CTL_2_1_BASE)->MS[(index)].CTL)
2468 #define MS_CTL_PC_CTL_VX(index) (((MS_CTL_1_2_Type*) MS_CTL_1_2_BASE)->MS[(index)].CTL)