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Searched refs:CY_BLE_RF_DCXO_BUF_CFG_REG (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/bless/
Dcy_ble_clk.c127 #define CY_BLE_RF_DCXO_BUF_CFG_REG (0x1e09U) macro
793 status = Cy_BLE_HAL_RcbRegRead(CY_BLE_RF_DCXO_BUF_CFG_REG, &temp); in Cy_BLE_HAL_MxdRadioEnableClocks()
847 status = Cy_BLE_HAL_RcbRegWrite(CY_BLE_RF_DCXO_BUF_CFG_REG, temp); in Cy_BLE_HAL_MxdRadioEnableClocks()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_ble_clk.c127 #define CY_BLE_RF_DCXO_BUF_CFG_REG (0x1e09U) macro
803 status = Cy_BLE_HAL_RcbRegRead(CY_BLE_RF_DCXO_BUF_CFG_REG, &temp); in Cy_BLE_HAL_MxdRadioEnableClocks()
857 status = Cy_BLE_HAL_RcbRegWrite(CY_BLE_RF_DCXO_BUF_CFG_REG, temp); in Cy_BLE_HAL_MxdRadioEnableClocks()