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Searched refs:CY_BLE_RCB_FIFO_WR_BIT_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/bless/
Dcy_ble_clk.c109 #define CY_BLE_RCB_FIFO_WR_BIT_MASK (0x8000UL) macro
606 … uint32_t temp = (uint32_t)((CY_BLE_RCB_FIFO_WR_BIT_MASK | addr) << CY_BLE_RCB_FIFO_WR_BIT_SHIFT); in Cy_BLE_HAL_RcbRegRead()
652 …uint32_t temp = ((uint32_t)((~CY_BLE_RCB_FIFO_WR_BIT_MASK & addr) << CY_BLE_RCB_FIFO_WR_BIT_SHIFT)… in Cy_BLE_HAL_RcbRegWrite()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_ble_clk.c109 #define CY_BLE_RCB_FIFO_WR_BIT_MASK (0x8000UL) macro
616 … uint32_t temp = (uint32_t)((CY_BLE_RCB_FIFO_WR_BIT_MASK | addr) << CY_BLE_RCB_FIFO_WR_BIT_SHIFT); in Cy_BLE_HAL_RcbRegRead()
662 …uint32_t temp = ((uint32_t)((~CY_BLE_RCB_FIFO_WR_BIT_MASK & addr) << CY_BLE_RCB_FIFO_WR_BIT_SHIFT)… in Cy_BLE_HAL_RcbRegWrite()