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Searched refs:CPUSS_TRIM_RAM_CTL2_PRESENT (Results 1 – 2 of 2) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829B0_config.h874 #define CPUSS_TRIM_RAM_CTL2_PRESENT 0u macro
Dcyw20829_config.h874 #define CPUSS_TRIM_RAM_CTL2_PRESENT 0u macro