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Searched refs:CONFIG3 (Results 1 – 7 of 7) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_srss_v3_3.h126 …__IOM uint32_t CONFIG3; /*!< 0x00000008 400MHz PLL Configuration Register 3 … member
136 …__IOM uint32_t CONFIG3; /*!< 0x00000008 400MHz Digital PLL Configuration Reg… member
Dcyip_srss_v3_2.h125 …__IOM uint32_t CONFIG3; /*!< 0x00000008 400MHz PLL Configuration Register 3 … member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_srss.h126 …__IOM uint32_t CONFIG3; /*!< 0x00000008 400MHz PLL Configuration Register 3 … member
136 __IOM uint32_t CONFIG3; /*!< 0x00000008 DPLL_LP Configuration Register 3 */ member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_srss_v3.h125 …__IOM uint32_t CONFIG3; /*!< 0x00000008 400MHz PLL Configuration Register 3 … member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h918 #define SRSS_CLK_DPLL_LP_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_DPLL_LP[pllNum].CONFIG3)
1060 …LP_PLL_CONFIG3(pllNum) (((CLK_LP_PLL_Type*) &SRSS->CLK_LP_PLL[pllNum])->PLL28LP_STRUCT.CONFIG3)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h451 …SS_CLK_PLL_400M_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum].CONFIG3)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h272 …SS_CLK_PLL_400M_CONFIG3(pllNum) (((SRSS_Type *) SRSS)->CLK_PLL400M[pllNum].CONFIG3)