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Searched refs:CFG_OUT (Results 1 – 9 of 9) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/source/
Dcy_device.c135 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V1_Type, CFG_OUT),
257 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_OUT),
377 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_OUT),
497 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_OUT),
618 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_OUT),
739 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_OUT),
866 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_V2_Type, CFG_OUT),
986 /* gpioPrtCfgOutOffset */ (uint8_t)offsetof(GPIO_PRT_Type, CFG_OUT),
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/ip/
Dcyip_gpio_v3.h56 …__IOM uint32_t CFG_OUT; /*!< 0x0000004C Port output buffer configuration reg… member
Dcyip_gpio_v5.h56 …__IOM uint32_t CFG_OUT; /*!< 0x0000004C Port output buffer configuration reg… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/ip/
Dcyip_gpio.h55 …__IOM uint32_t CFG_OUT; /*!< 0x00000030 Port output buffer configuration reg… member
Dcyip_gpio_v2.h56 …__IOM uint32_t CFG_OUT; /*!< 0x0000004C Port output buffer configuration reg… member
Dcyip_gpio_v5.h56 …__IOM uint32_t CFG_OUT; /*!< 0x0000004C Port output buffer configuration reg… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/ip/
Dcyip_gpio.h56 …__IOM uint32_t CFG_OUT; /*!< 0x0000004C Port output buffer configuration reg… member
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h1991 #define GPIO_PRT_CFG_OUT(base) (((GPIO_PRT_Type*)(base))->CFG_OUT)
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcy_device.h569 #define GPIO_PRT_CFG_OUT(base) (((GPIO_PRT_Type*)(base))->CFG_OUT)