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Searched refs:BLE_RCB_INTR (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-latest/bless/
Dcy_ble_clk.c612 while(((BLE_RCB_INTR & BLE_RCB_INTR_RCB_DONE_Msk) == 0U) && (timeout > 0U)) in Cy_BLE_HAL_RcbRegRead()
620 BLE_RCB_INTR |= BLE_RCB_INTR_RCB_DONE_Msk; in Cy_BLE_HAL_RcbRegRead()
657 while(((BLE_RCB_INTR & BLE_RCB_INTR_RCB_DONE_Msk) == 0U) && (timeout > 0U)) in Cy_BLE_HAL_RcbRegWrite()
665 BLE_RCB_INTR |= BLE_RCB_INTR_RCB_DONE_Msk; in Cy_BLE_HAL_RcbRegWrite()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_ble_clk.c622 while(((BLE_RCB_INTR & BLE_RCB_INTR_RCB_DONE_Msk) == 0U) && (timeout > 0U)) in Cy_BLE_HAL_RcbRegRead()
630 BLE_RCB_INTR |= BLE_RCB_INTR_RCB_DONE_Msk; in Cy_BLE_HAL_RcbRegRead()
667 while(((BLE_RCB_INTR & BLE_RCB_INTR_RCB_DONE_Msk) == 0U) && (timeout > 0U)) in Cy_BLE_HAL_RcbRegWrite()
675 BLE_RCB_INTR |= BLE_RCB_INTR_RCB_DONE_Msk; in Cy_BLE_HAL_RcbRegWrite()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1916 #define BLE_RCB_INTR (((BLE_V1_Type *) BLE_BASE)->RCB.INTR) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h2307 #define BLE_RCB_INTR (((BLE_V1_Type *) BLE_BASE)->RCB.INTR) macro