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Searched refs:BLE_BLESS_XTAL_CLK_DIV_CONFIG (Results 1 – 4 of 4) sorted by relevance

/hal_infineon-latest/bless/
Dcy_ble_clk.c855 BLE_BLESS_XTAL_CLK_DIV_CONFIG = temp; in Cy_BLE_HAL_MxdRadioEnableClocks()
/hal_infineon-latest/mtb-pdl-cat1/drivers/source/
Dcy_ble_clk.c865 BLE_BLESS_XTAL_CLK_DIV_CONFIG = temp; in Cy_BLE_HAL_MxdRadioEnableClocks()
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dcy_device.h1921 #define BLE_BLESS_XTAL_CLK_DIV_CONFIG (((BLE_V1_Type *) BLE_BASE)->BLESS.XTAL_CLK_DIV_CONFIG) macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dcy_device.h2312 #define BLE_BLESS_XTAL_CLK_DIV_CONFIG (((BLE_V1_Type *) BLE_BASE)->BLESS.XTAL_CLK_DIV_CONFIG) macro