Home
last modified time | relevance | path

Searched refs:offset (Results 1 – 25 of 44) sorted by relevance

12

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_efuse_v3.c137 cy_en_efuse_status_t Cy_EFUSE_WriteBit(EFUSE_Type *base, uint32_t bitPos, uint32_t offset) in Cy_EFUSE_WriteBit() argument
139 if((offset > EFUSE_SIZE) || (bitPos > CY_EFUSE_BITS_PER_BYTE)) in Cy_EFUSE_WriteBit()
158 uint32_t byteAddr = offset / EFUSE_MACRO_NUM; in Cy_EFUSE_WriteBit()
159 uint32_t macroAddr = offset % EFUSE_MACRO_NUM; in Cy_EFUSE_WriteBit()
185 (void)Cy_EFUSE_ReadByte(base, &readByte, offset); in Cy_EFUSE_WriteBit()
200 cy_en_efuse_status_t Cy_EFUSE_WriteByte(EFUSE_Type *base, uint32_t src, uint32_t offset) in Cy_EFUSE_WriteByte() argument
204 if ((offset < EFUSE_SIZE) && (src <= 0xFFUL)) in Cy_EFUSE_WriteByte()
210 (void)Cy_EFUSE_ReadByte(base, &readByte, offset); in Cy_EFUSE_WriteByte()
218 ret = Cy_EFUSE_WriteBit(base, bitPos, offset); in Cy_EFUSE_WriteByte()
235 cy_en_efuse_status_t Cy_EFUSE_WriteWord(EFUSE_Type *base, uint32_t src, uint32_t offset) in Cy_EFUSE_WriteWord() argument
[all …]
Dcy_efuse.c61 uint32_t offset = bitNum / CY_EFUSE_BITS_PER_BYTE; in Cy_EFUSE_GetEfuseBit() local
66 result = Cy_EFUSE_GetEfuseByte(offset, &byteVal); in Cy_EFUSE_GetEfuseBit()
78 cy_en_efuse_status_t Cy_EFUSE_GetEfuseByte(uint32_t offset, uint8_t *byteVal) in Cy_EFUSE_GetEfuseByte() argument
86 opcode = CY_EFUSE_OPCODE_READ_FUSE_BYTE | (offset << CY_EFUSE_OPCODE_OFFSET_Pos); in Cy_EFUSE_GetEfuseByte()
Dcy_sar2.c354 base->DIG_CAL = (_VAL2FLD(PASS_SAR_DIG_CAL_DOFFSET, digCalibConfig->offset) | in Cy_SAR2_SetDigitalCalibrationValue()
387 digCalibConfig->offset = (uint16_t) _FLD2VAL(PASS_SAR_DIG_CAL_DOFFSET, digCal); in Cy_SAR2_GetDigitalCalibrationValue()
422 base->DIG_CAL_ALT = (_VAL2FLD(PASS_SAR_DIG_CAL_ALT_DOFFSET, altDigCalibConfig->offset) | in Cy_SAR2_SetAltDigitalCalibrationValue()
458 altDigCalibConfig->offset = (uint16_t) _FLD2VAL(PASS_SAR_DIG_CAL_ALT_DOFFSET, digCalAlt); in Cy_SAR2_GetAltDigitalCalibrationValue()
493 base->ANA_CAL = (_VAL2FLD(PASS_SAR_ANA_CAL_AOFFSET, analogCalibConfig->offset) | in Cy_SAR2_SetAnalogCalibrationValue()
529 analogCalibConfig->offset = (int8_t) _FLD2VAL(PASS_SAR_ANA_CAL_AOFFSET, anaCal); in Cy_SAR2_GetAnalogCalibrationValue()
564 base->ANA_CAL_ALT = (_VAL2FLD(PASS_SAR_ANA_CAL_ALT_AOFFSET, altAnalogCalibConfig->offset) | in Cy_SAR2_SetAltAnalogCalibrationValue()
600 altAnalogCalibConfig->offset = (int8_t) _FLD2VAL(PASS_SAR_ANA_CAL_AOFFSET, altAnaCal); in Cy_SAR2_GetAltAnalogCalibrationValue()
Dcy_adcmic.c394 void Cy_ADCMic_SetDcOffset(int16_t offset, cy_stc_adcmic_context_t * context) in Cy_ADCMic_SetDcOffset() argument
398 context->offset = offset; in Cy_ADCMic_SetDcOffset()
412 …return ((int32_t)(((int64_t)adcCounts - (int64_t)context->offset) * CY_ADCMIC_UV / (int64_t)contex… in Cy_ADCMic_CountsTo_uVolts()
417 …return ((int16_t)(((int32_t)adcCounts - (int32_t)context->offset) * CY_ADCMIC_MV / (int32_t)contex… in Cy_ADCMic_CountsTo_mVolts()
422 return (((float)adcCounts - (float)context->offset) / (float)context->gain); in Cy_ADCMic_CountsTo_Volts()
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
Dcy_csd.h697 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset);
698 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value);
699 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask);
700 __STATIC_INLINE void Cy_CSD_ClrBits(CSD_Type * base, uint32_t offset, uint32_t mask);
701 __STATIC_INLINE void Cy_CSD_WriteBits(CSD_Type* base, uint32_t offset, uint32_t mask, uint32_t valu…
720 __STATIC_INLINE uint32_t Cy_CSD_ReadReg(const CSD_Type * base, uint32_t offset) in Cy_CSD_ReadReg() argument
722 return(* (volatile uint32_t *)((uint32_t)base + offset)); in Cy_CSD_ReadReg()
742 __STATIC_INLINE void Cy_CSD_WriteReg(CSD_Type * base, uint32_t offset, uint32_t value) in Cy_CSD_WriteReg() argument
744 (* (volatile uint32_t *)((uint32_t)base + offset)) = value; in Cy_CSD_WriteReg()
765 __STATIC_INLINE void Cy_CSD_SetBits(CSD_Type * base, uint32_t offset, uint32_t mask) in Cy_CSD_SetBits() argument
[all …]
Dcy_efuse.h271 cy_en_efuse_status_t Cy_EFUSE_GetEfuseByte(uint32_t offset, uint8_t *byteVal);
417 cy_en_efuse_status_t Cy_EFUSE_WriteBit(EFUSE_Type *base, uint32_t bitPos, uint32_t offset);
446 cy_en_efuse_status_t Cy_EFUSE_WriteByte(EFUSE_Type *base, uint32_t src, uint32_t offset);
476 cy_en_efuse_status_t Cy_EFUSE_WriteWord(EFUSE_Type *base, uint32_t src, uint32_t offset);
511 cy_en_efuse_status_t Cy_EFUSE_WriteWordArray(EFUSE_Type *base, const uint32_t *src, uint32_t offset…
541 …_efuse_status_t Cy_EFUSE_ReadBit(EFUSE_Type *base, uint8_t *dst, uint32_t bitPos, uint32_t offset);
568 cy_en_efuse_status_t Cy_EFUSE_ReadByte(EFUSE_Type *base, uint8_t *dst, uint32_t offset);
596 cy_en_efuse_status_t Cy_EFUSE_ReadWord(EFUSE_Type *base, uint32_t *dst, uint32_t offset);
627 cy_en_efuse_status_t Cy_EFUSE_ReadWordArray(EFUSE_Type *base, uint32_t *dst, uint32_t offset, uint3…
Dcy_crypto_core_hw_v2.h309 __STATIC_INLINE void Cy_Crypto_Core_V2_RBXor(CRYPTO_Type *base, uint32_t offset, uint32_t size) in Cy_Crypto_Core_V2_RBXor() argument
317 (offset << CY_CRYPTO_RSRC8_SHIFT) | in Cy_Crypto_Core_V2_RBXor()
321 __STATIC_INLINE void Cy_Crypto_Core_V2_RBStore(CRYPTO_Type *base, uint32_t offset, uint32_t size) in Cy_Crypto_Core_V2_RBStore() argument
329 (offset << CY_CRYPTO_RSRC8_SHIFT) | in Cy_Crypto_Core_V2_RBStore()
332 __STATIC_INLINE void Cy_Crypto_Core_V2_RBSetByte(CRYPTO_Type *base, uint32_t offset, uint8_t byte) in Cy_Crypto_Core_V2_RBSetByte() argument
340 (offset << CY_CRYPTO_RSRC8_SHIFT) | in Cy_Crypto_Core_V2_RBSetByte()
Dcy_adcmic.h634 int16_t offset; /**< The storage for the offset calibration value */ member
992 void Cy_ADCMic_SetDcOffset(int16_t offset, cy_stc_adcmic_context_t * context);
Dcy_sar2.h608 uint16_t offset; /**< Digital offset correction. The valid range is [0..4095] */ member
614 int8_t offset; /**< Analog offset correction. The valid range is [-128..127] */ member
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/resources/resource_imp/
Dwhd_resources.c65 resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset, uint32_t maxsize, …
68 uint32_t offset, uint32_t size, uint32_t *size_out, void *buffer);
92 resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset, uint32_t maxsize, … in resource_read() argument
95 if (offset > resource->size) in resource_read()
100 *size = MIN(maxsize, resource->size - offset); in resource_read()
104 memcpy(buffer, &resource->val.mem.data[offset], *size); in resource_read()
109 return platform_read_external_resource(resource, offset, maxsize, size, buffer); in resource_read()
124 …WICED_SUCCESS != wiced_filesystem_file_seek (&file_handle, (offset + resource->val.fs.offset), SEE… in resource_read()
147 if (0 != wicedfs_fseek(&file_hnd, (long)(offset + resource->val.fs.offset), SEEK_SET) ) in resource_read()
316 uint32_t offset, uint32_t size, uint32_t *size_out, void *buffer) in host_resource_read() argument
[all …]
Dwiced_resource.h135 unsigned long offset; /**< Offset to the start of the resource */ member
199 extern resource_result_t resource_read(const resource_hnd_t *resource, uint32_t offset, uint32_t ma…
212 …t_t resource_get_readonly_buffer(const resource_hnd_t *resource, uint32_t offset, uint32_t maxsize,
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/src/bus_protocols/
Dwhd_chip_reg.h34 #define D11REG_ADDR(offset) (D11_BASE_ADDR + offset) argument
35 #define D11IHR_ADDR(offset) (D11_AXI_BASE_ADDR + 0x400 + (2 * offset) ) argument
36 #define D11SHM_ADDR(offset) (D11_SHM_BASE_ADDR + offset) argument
/hal_infineon-3.6.0/XMCLib/drivers/src/
Dxmc_ccu4.c780 uint8_t offset; in XMC_CCU4_SLICE_ConfigureEvent() local
793 offset = ((uint8_t) event) - 1U; in XMC_CCU4_SLICE_ConfigureEvent()
799 pos = ((uint8_t) CCU4_CC4_INS2_EV0EM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent()
804 pos = ((uint8_t) CCU4_CC4_INS2_EV0LM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent()
809 pos = ((uint8_t) CCU4_CC4_INS2_LPF0M_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent()
818 pos = ((uint8_t) CCU4_CC4_INS1_EV0IS_Pos) + (uint8_t)(offset << 3U); in XMC_CCU4_SLICE_ConfigureEvent()
828 pos = ((uint8_t) CCU4_CC4_INS_EV0EM_Pos) + (uint8_t)(offset << 1U); in XMC_CCU4_SLICE_ConfigureEvent()
833 pos = ((uint8_t) CCU4_CC4_INS_EV0LM_Pos) + offset; in XMC_CCU4_SLICE_ConfigureEvent()
838 pos = ((uint8_t) CCU4_CC4_INS_LPF0M_Pos) + (uint8_t)(offset << 1U); in XMC_CCU4_SLICE_ConfigureEvent()
843 pos = ((uint8_t) CCU4_CC4_INS_EV0IS_Pos) + (uint8_t)(offset << 2U); in XMC_CCU4_SLICE_ConfigureEvent()
[all …]
Dxmc_ccu8.c827 uint8_t offset; in XMC_CCU8_SLICE_ConfigureEvent() local
841 offset = ((uint8_t) event) - 1U; in XMC_CCU8_SLICE_ConfigureEvent()
847 pos = ((uint8_t) CCU8_CC8_INS2_EV0EM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent()
852 pos = ((uint8_t) CCU8_CC8_INS2_EV0LM_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent()
857 pos = ((uint8_t) CCU8_CC8_INS2_LPF0M_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent()
866 pos = ((uint8_t) CCU8_CC8_INS1_EV0IS_Pos) + (uint8_t)(offset << 3U); in XMC_CCU8_SLICE_ConfigureEvent()
876 pos = ((uint8_t) CCU8_CC8_INS_EV0EM_Pos) + (uint8_t)(offset << 1U); in XMC_CCU8_SLICE_ConfigureEvent()
881 pos = ((uint8_t) CCU8_CC8_INS_EV0LM_Pos) + offset; in XMC_CCU8_SLICE_ConfigureEvent()
886 pos = ((uint8_t) CCU8_CC8_INS_LPF0M_Pos) + (uint8_t)(offset << 1U); in XMC_CCU8_SLICE_ConfigureEvent()
891 pos = ((uint8_t) CCU8_CC8_INS_EV0IS_Pos) + (uint8_t)(offset << 2U); in XMC_CCU8_SLICE_ConfigureEvent()
[all …]
Dxmc1_scu.c819 int32_t offset; in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature() local
826 offset = b + (((a - b) * (temperature - d)) / (e - d)); in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature()
827 offset &= SCU_ANALOG_ANAOFFSET_ADJL_OFFSET_Msk; in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature()
830 SCU_ANALOG->ANAOFFSET = (uint16_t)offset; in XMC_SCU_CLOCK_CalibrateOscillatorOnTemperature()
/hal_infineon-3.6.0/mtb-hal-cat1/source/
Dcyhal_irq_impl.c74 uint8_t offset = bit - start_bit; in _cyhal_system_irq_lookup_priority() local
76 result |= (bit_value << offset); in _cyhal_system_irq_lookup_priority()
89 uint8_t offset = bit - start_bit; in _cyhal_system_irq_store_priority() local
90 uint8_t bit_value = priority & (1u << offset); in _cyhal_system_irq_store_priority()
Dcyhal_lptimer.c562 obj->offset = 0; in cyhal_lptimer_init()
650 obj->offset = Cy_MCWDT_GetCount(obj->base, CY_MCWDT_COUNTER2); in cyhal_lptimer_reload()
670 obj->final_time = ticks + obj->offset; in cyhal_lptimer_set_match()
688 if(obj->offset > ctr2_count) in cyhal_lptimer_read()
690 return (uint32_t)((((uint64_t)1 << 32) - obj->offset) + ctr2_count); in cyhal_lptimer_read()
694 return ctr2_count - obj->offset; in cyhal_lptimer_read()
Dcyhal_qspi.c601 …cyhal_qspi_get_dataselect(cyhal_gpio_t io0, cy_en_smif_data_select_t *data_select, uint8_t *offset) in _cyhal_qspi_get_dataselect() argument
609 *offset = 0; in _cyhal_qspi_get_dataselect()
618 *offset = 2; in _cyhal_qspi_get_dataselect()
629 *offset = 4; in _cyhal_qspi_get_dataselect()
639 *offset = 6; in _cyhal_qspi_get_dataselect()
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/src/
Dwhd_resource_if.c104 uint32_t whd_resource_read(whd_driver_t whd_driver, whd_resource_type_t type, uint32_t offset, in whd_resource_read() argument
109 …return whd_driver->resource_if->whd_resource_read(whd_driver, type, offset, size, size_out, buffer… in whd_resource_read()
Dwhd_chip_constants.c141 uint32_t offset = 0; in get_socsram_base_address() local
144 offset = WRAPPER_REGISTER_OFFSET; in get_socsram_base_address()
151 *addr = 0x18004000 + offset; in get_socsram_base_address()
/hal_infineon-3.6.0/XMCLib/drivers/inc/
Dxmc_dsd.h416 …int16_t offset; /**< Offset subtracted from result.This parameter can take a value of int16_t */ member
918 …ATIC_INLINE void XMC_DSD_CH_MainFilter_SetOffset(XMC_DSD_CH_t *const channel, const int16_t offset) in XMC_DSD_CH_MainFilter_SetOffset() argument
921 channel->OFFM = (uint32_t)offset; in XMC_DSD_CH_MainFilter_SetOffset()
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/src/include/
Dwhd_resource_if.h50 uint32_t whd_resource_read(whd_driver_t whd_driver, whd_resource_type_t type, uint32_t offset,
/hal_infineon-3.6.0/wifi-host-driver/WiFi_Host_Driver/inc/
Dwhd_resource_api.h139 uint32_t offset, uint32_t size, uint32_t *size_out, void *buffer);
/hal_infineon-3.6.0/abstraction-rtos/source/COMPONENT_FREERTOS/
Dcyabs_rtos_freertos.c110 uint32_t offset = (stack == NULL) in cy_rtos_create_thread() local
113 uint32_t size = offset + sizeof(cy_task_wrapper_t); in cy_rtos_create_thread()
128 cy_task_wrapper_t* wrapper = (cy_task_wrapper_t*)(ident + offset); in cy_rtos_create_thread()
/hal_infineon-3.6.0/mtb-hal-cat1/include/
Dcyhal_nvm.h131 uint32_t offset; //!< Offset to the address in the distinct NVM region. member

12