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Searched refs:P2_3_TCPWM0_LINE_COMPL5 (Results 1 – 8 of 8) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dgpio_xmc7100_100_teqfp.h655 P2_3_TCPWM0_LINE_COMPL5 = 9, /* Digital Active - tcpwm[0].line_compl[5]:1 */ enumerator
Dgpio_xmc7100_144_teqfp.h907 P2_3_TCPWM0_LINE_COMPL5 = 9, /* Digital Active - tcpwm[0].line_compl[5]:1 */ enumerator
Dgpio_xmc7100_176_teqfp.h1093 P2_3_TCPWM0_LINE_COMPL5 = 9, /* Digital Active - tcpwm[0].line_compl[5]:1 */ enumerator
Dgpio_xmc7100_272_bga.h1425 P2_3_TCPWM0_LINE_COMPL5 = 9, /* Digital Active - tcpwm[0].line_compl[5]:1 */ enumerator
/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1C/source/pin_packages/
Dcyhal_xmc7100_100_teqfp.c860 {0u, 5u, P2_3, P2_3_TCPWM0_LINE_COMPL5},
Dcyhal_xmc7100_144_teqfp.c1075 {0u, 5u, P2_3, P2_3_TCPWM0_LINE_COMPL5},
Dcyhal_xmc7100_176_teqfp.c1216 {0u, 5u, P2_3, P2_3_TCPWM0_LINE_COMPL5},
Dcyhal_xmc7100_272_bga.c1334 {0u, 5u, P2_3, P2_3_TCPWM0_LINE_COMPL5},