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Searched refs:CY_BLE_MXD_RADIO_CLK_DIV_2 (Results 1 – 3 of 3) sorted by relevance

/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/include/
Dcy_ble_clk.h156 CY_BLE_MXD_RADIO_CLK_DIV_2 = 1U, enumerator
/hal_infineon-3.6.0/mtb-pdl-cat1/drivers/source/
Dcy_ble_clk.c830 blerdDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_2; in Cy_BLE_HAL_MxdRadioEnableClocks()
835 blellDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_2 - blerdDivider; in Cy_BLE_HAL_MxdRadioEnableClocks()
/hal_infineon-3.6.0/bless/
Dcy_ble_clk.c830 blerdDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_2; in Cy_BLE_HAL_MxdRadioEnableClocks()
835 blellDivider = (uint16_t)CY_BLE_MXD_RADIO_CLK_DIV_2 - blerdDivider; in Cy_BLE_HAL_MxdRadioEnableClocks()