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Searched refs:P2_1_TCPWM0_LINE6 (Results 1 – 8 of 8) sorted by relevance

/hal_infineon-3.5.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dgpio_xmc7100_100_teqfp.h616 P2_1_TCPWM0_LINE6 = 8, /* Digital Active - tcpwm[0].line[6]:1 */ enumerator
Dgpio_xmc7100_144_teqfp.h868 P2_1_TCPWM0_LINE6 = 8, /* Digital Active - tcpwm[0].line[6]:1 */ enumerator
Dgpio_xmc7100_176_teqfp.h1054 P2_1_TCPWM0_LINE6 = 8, /* Digital Active - tcpwm[0].line[6]:1 */ enumerator
Dgpio_xmc7100_272_bga.h1386 P2_1_TCPWM0_LINE6 = 8, /* Digital Active - tcpwm[0].line[6]:1 */ enumerator
/hal_infineon-3.5.0/mtb-hal-cat1/COMPONENT_CAT1C/source/pin_packages/
Dcyhal_xmc7100_100_teqfp.c774 {0u, 6u, P2_1, P2_1_TCPWM0_LINE6},
Dcyhal_xmc7100_144_teqfp.c944 {0u, 6u, P2_1, P2_1_TCPWM0_LINE6},
Dcyhal_xmc7100_176_teqfp.c1051 {0u, 6u, P2_1, P2_1_TCPWM0_LINE6},
Dcyhal_xmc7100_272_bga.c1164 {0u, 6u, P2_1, P2_1_TCPWM0_LINE6},