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Searched refs:XMC_USIC0_CH1 (Results 1 – 6 of 6) sorted by relevance

/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc_i2c.h122 #define XMC_I2C0_CH1 XMC_USIC0_CH1 /**< USIC0 channel 1 base address */
Dxmc_i2s.h97 #define XMC_I2S0_CH1 XMC_USIC0_CH1 /**< USIC0 channel 1 base address */
Dxmc_uart.h110 #define XMC_UART0_CH1 XMC_USIC0_CH1 /**< USIC0 channel 1 base address */
Dxmc_usic.h139 #define XMC_USIC0_CH1 ((XMC_USIC_CH_t *)USIC0_CH1_BASE) /**< USIC0 channel 1 base address */ macro
581 tmp = ((channel == XMC_USIC0_CH0) || (channel == XMC_USIC0_CH1)); in XMC_USIC_IsChannelValid()
Dxmc_spi.h127 #define XMC_SPI0_CH1 XMC_USIC0_CH1 /**< SPI0 channel 1 base address */
/hal_infineon-3.4.0/XMCLib/drivers/src/
Dxmc_usic.c97 if ((channel == XMC_USIC0_CH0) || (channel == XMC_USIC0_CH1)) in XMC_USIC_CH_Enable()