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Searched refs:P3_1 (Results 1 – 24 of 24) sorted by relevance

/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c44 {0u, 1u, P3_1, HSIOM_SEL_GPIO},
83 {0u, 4u, P3_1, P3_1_KEYSCAN_KS_ROW4},
90 {0u, 0u, P3_1, P3_1_LIN0_LIN_EN0},
155 {1u, 0u, P3_1, P3_1_SCB1_SPI_CLK},
198 {1u, 0u, P3_1, P3_1_SCB1_SPI_CLK},
247 {2u, 0u, P3_1, P3_1_SCB2_UART_RTS},
321 {0u, 0u, P3_1, P3_1_TCPWM0_LINE_COMPL0},
322 {1u, 0u, P3_1, P3_1_TCPWM0_LINE_COMPL256},
Dcyhal_cyw20829_56_qfn.c45 {0u, 1u, P3_1, HSIOM_SEL_GPIO},
107 {0u, 4u, P3_1, P3_1_KEYSCAN_KS_ROW4},
115 {0u, 0u, P3_1, P3_1_LIN0_LIN_EN0},
188 {1u, 0u, P3_1, P3_1_SCB1_SPI_CLK},
239 {1u, 0u, P3_1, P3_1_SCB1_SPI_CLK},
297 {2u, 0u, P3_1, P3_1_SCB2_UART_RTS},
393 {0u, 0u, P3_1, P3_1_TCPWM0_LINE_COMPL0},
394 {1u, 0u, P3_1, P3_1_TCPWM0_LINE_COMPL256},
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_03_68_qfn.c85 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
133 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
159 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
233 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
330 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
359 {0u, 0u, P3_1, P3_1_SDHC0_CARD_IF_PWR_EN},
489 {0u, 3u, P3_1, P3_1_TCPWM0_LINE_COMPL3},
490 {1u, 7u, P3_1, P3_1_TCPWM1_LINE_COMPL7},
Dcyhal_psoc6_02_68_qfn.c123 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
174 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
203 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
287 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
401 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
441 {0u, 0u, P3_1, P3_1_SDHC0_CARD_IF_PWR_EN},
601 {0u, 2u, P3_1, P3_1_TCPWM0_LINE_COMPL2},
602 {1u, 19u, P3_1, P3_1_TCPWM1_LINE_COMPL19},
Dcyhal_psoc6_03_100_tqfp.c88 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
140 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
169 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
251 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
358 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
388 {0u, 0u, P3_1, P3_1_SDHC0_CARD_IF_PWR_EN},
530 {0u, 3u, P3_1, P3_1_TCPWM0_LINE_COMPL3},
531 {1u, 7u, P3_1, P3_1_TCPWM1_LINE_COMPL7},
Dcyhal_psoc6_04_68_qfn.c118 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
165 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
348 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
468 {0u, 3u, P3_1, P3_1_TCPWM0_LINE_COMPL3},
469 {1u, 7u, P3_1, P3_1_TCPWM0_LINE_COMPL263},
525 {1u, 2u, P3_1, P3_1_TCPWM0_TR_ONE_CNT_IN258},
Dcyhal_psoc6_04_64_tqfp.c120 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
167 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
354 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
475 {0u, 3u, P3_1, P3_1_TCPWM0_LINE_COMPL3},
476 {1u, 7u, P3_1, P3_1_TCPWM0_LINE_COMPL263},
533 {1u, 2u, P3_1, P3_1_TCPWM0_TR_ONE_CNT_IN258},
Dcyhal_psoc6_04_80_tqfp.c120 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
167 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
358 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
479 {0u, 3u, P3_1, P3_1_TCPWM0_LINE_COMPL3},
480 {1u, 7u, P3_1, P3_1_TCPWM0_LINE_COMPL263},
540 {1u, 2u, P3_1, P3_1_TCPWM0_TR_ONE_CNT_IN258},
Dcyhal_psoc6_02_124_bga.c144 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
211 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
255 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
385 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
563 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
619 {0u, 0u, P3_1, P3_1_SDHC0_CARD_IF_PWR_EN},
835 {0u, 2u, P3_1, P3_1_TCPWM0_LINE_COMPL2},
836 {1u, 19u, P3_1, P3_1_TCPWM1_LINE_COMPL19},
Dcyhal_psoc6_02_128_tqfp.c144 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
211 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
256 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
388 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
569 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
625 {0u, 0u, P3_1, P3_1_SDHC0_CARD_IF_PWR_EN},
843 {0u, 2u, P3_1, P3_1_TCPWM0_LINE_COMPL2},
844 {1u, 19u, P3_1, P3_1_TCPWM1_LINE_COMPL19},
Dcyhal_psoc6_01_124_bga.c103 {0u, 0u, P3_1, P3_1_BLESS_MXD_ACT_DBUS_RX_EN},
258 {0u, 7u, P3_1, P3_1_PERI_TR_IO_INPUT7},
320 {2u, 0u, P3_1, P3_1_SCB2_I2C_SDA},
361 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
491 {2u, 0u, P3_1, P3_1_SCB2_SPI_MISO},
656 {2u, 0u, P3_1, P3_1_SCB2_UART_TX},
859 {0u, 2u, P3_1, P3_1_TCPWM0_LINE_COMPL2},
860 {1u, 19u, P3_1, P3_1_TCPWM1_LINE_COMPL19},
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_40_qfn.h70 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_cyw20829_56_qfn.h78 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_04_68_qfn.h72 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_04_80_tqfp.h76 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_03_68_qfn.h72 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_04_64_tqfp.h72 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_03_100_tqfp.h72 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_02_68_qfn.h72 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_02_124_bga.h79 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_02_128_tqfp.h79 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
Dcyhal_psoc6_01_124_bga.h79 P3_1 = CYHAL_GET_GPIO(CYHAL_PORT_3, 1), //!< Port 3 Pin 1 enumerator
/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc4_gpio_map.h1154 #define P3_1 XMC_GPIO_PORT3, 1 macro
1427 #define P3_1 XMC_GPIO_PORT3, 1 macro
1866 #define P3_1 XMC_GPIO_PORT3, 1 macro
2286 #define P3_1 XMC_GPIO_PORT3, 1 macro
2768 #define P3_1 XMC_GPIO_PORT3, 1 macro
3088 #define P3_1 XMC_GPIO_PORT3, 1 macro
3570 #define P3_1 XMC_GPIO_PORT3, 1 macro
3869 #define P3_1 XMC_GPIO_PORT3, 1 macro
4165 #define P3_1 XMC_GPIO_PORT3, 1 macro
4616 #define P3_1 XMC_GPIO_PORT3, 1 macro
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Dxmc1_gpio_map.h3007 #define P3_1 XMC_GPIO_PORT3, 1 macro
3622 #define P3_1 XMC_GPIO_PORT3, 1 macro
4502 #define P3_1 XMC_GPIO_PORT3, 1 macro
5469 #define P3_1 XMC_GPIO_PORT3, 1 macro
5736 #define P3_1 XMC_GPIO_PORT3, 1 macro
6823 #define P3_1 XMC_GPIO_PORT3, 1 macro