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Searched refs:P0_0 (Results 1 – 25 of 42) sorted by relevance

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/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_56_qfn.c75 {0u, 3u, P0_0, P0_0_KEYSCAN_KS_COL3},
132 {0u, 1u, P0_0, P0_0_PDM_PDM_CLK1},
217 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
268 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
379 {0u, 0u, P0_0, P0_0_TCPWM0_LINE_COMPL0},
380 {1u, 6u, P0_0, P0_0_TCPWM0_LINE_COMPL262},
414 {0u, 0u, P0_0, P0_0_TDM_TDM_RX_MCK0},
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.c74 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
168 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
233 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
372 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
373 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_04_68_qfn.c109 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
222 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
291 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
398 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
399 {1u, 0u, P0_0, P0_0_TCPWM0_LINE256},
510 {0u, 0u, P0_0, P0_0_TCPWM0_TR_ONE_CNT_IN0},
Dcyhal_psoc6_04_64_tqfp.c111 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
224 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
295 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
404 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
405 {1u, 0u, P0_0, P0_0_TCPWM0_LINE256},
518 {0u, 0u, P0_0, P0_0_TCPWM0_TR_ONE_CNT_IN0},
Dcyhal_psoc6_04_80_tqfp.c111 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
224 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
297 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
408 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
409 {1u, 0u, P0_0, P0_0_TCPWM0_LINE256},
522 {0u, 0u, P0_0, P0_0_TCPWM0_TR_ONE_CNT_IN0},
Dcyhal_psoc6_03_68_qfn.c76 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
197 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
271 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
419 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
420 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_43_smt.c245 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
334 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
403 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
531 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
532 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_68_qfn_ble.c237 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
349 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
424 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
556 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
557 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_02_68_qfn.c118 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
245 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
329 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
533 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
534 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_03_100_tqfp.c79 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
210 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
292 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
448 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
449 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_80_wlcsp.c245 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
380 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
475 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
627 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
628 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_104_m_csp_ble_usb.c247 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
390 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
493 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
653 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
654 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_104_m_csp_ble.c247 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
391 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
495 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
656 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
657 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_116_bga_ble.c249 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
394 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
504 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
671 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
672 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_116_bga_usb.c249 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
393 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
500 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
664 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
665 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_02_100_wlcsp.c135 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
295 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
407 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
653 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
654 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_124_bga_sip.c251 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
398 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
513 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
685 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
686 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_02_124_bga.c137 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
314 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
444 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
713 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
714 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_02_128_tqfp.c137 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
316 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
448 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
719 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
720 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
Dcyhal_psoc6_01_124_bga.c251 {0u, 0u, P0_0, P0_0_PERI_TR_IO_INPUT0},
420 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
550 {0u, 0u, P0_0, P0_0_SCB0_SPI_SELECT1},
737 {0u, 0u, P0_0, P0_0_TCPWM0_LINE0},
738 {1u, 0u, P0_0, P0_0_TCPWM1_LINE0},
/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc1_gpio_map.h69 #define P0_0 XMC_GPIO_PORT0, 0 macro
162 #define P0_0 XMC_GPIO_PORT0, 0 macro
291 #define P0_0 XMC_GPIO_PORT0, 0 macro
354 #define P0_0 XMC_GPIO_PORT0, 0 macro
478 #define P0_0 XMC_GPIO_PORT0, 0 macro
692 #define P0_0 XMC_GPIO_PORT0, 0 macro
894 #define P0_0 XMC_GPIO_PORT0, 0 macro
1049 #define P0_0 XMC_GPIO_PORT0, 0 macro
1244 #define P0_0 XMC_GPIO_PORT0, 0 macro
1353 #define P0_0 XMC_GPIO_PORT0, 0 macro
[all …]
Dxmc4_gpio_map.h80 #define P0_0 XMC_GPIO_PORT0, 0 macro
242 #define P0_0 XMC_GPIO_PORT0, 0 macro
354 #define P0_0 XMC_GPIO_PORT0, 0 macro
510 #define P0_0 XMC_GPIO_PORT0, 0 macro
617 #define P0_0 XMC_GPIO_PORT0, 0 macro
746 #define P0_0 XMC_GPIO_PORT0, 0 macro
837 #define P0_0 XMC_GPIO_PORT0, 0 macro
999 #define P0_0 XMC_GPIO_PORT0, 0 macro
1111 #define P0_0 XMC_GPIO_PORT0, 0 macro
1384 #define P0_0 XMC_GPIO_PORT0, 0 macro
[all …]
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.h55 P0_0 = CYHAL_GET_GPIO(CYHAL_PORT_0, 0), //!< Port 0 Pin 0 enumerator
Dcyhal_psoc6_04_68_qfn.h55 P0_0 = CYHAL_GET_GPIO(CYHAL_PORT_0, 0), //!< Port 0 Pin 0 enumerator
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_56_qfn.h55 P0_0 = CYHAL_GET_GPIO(CYHAL_PORT_0, 0), //!< Port 0 Pin 0 enumerator

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