Searched refs:BRG (Results 1 – 8 of 8) sorted by relevance
177 channel->BRG = (channel->BRG & ~(USIC_CH_BRG_DCTQ_Msk | in XMC_USIC_CH_SetBaudrate()228 channel->BRG = (channel->BRG & ~(USIC_CH_BRG_DCTQ_Msk | in XMC_USIC_CH_SetBaudrateEx()248 if ((channel->BRG & USIC_CH_BRG_CTQSEL_Msk) == USIC_CH_BRG_CTQSEL_Msk) in XMC_USIC_CH_GetBaudrate()256 divider = (channel->BRG & USIC_CH_BRG_PPPEN_Msk) ? 2 : 1; in XMC_USIC_CH_GetBaudrate()258 if ((((channel->BRG & USIC_CH_BRG_CTQSEL_Msk) >> USIC_CH_BRG_CTQSEL_Pos) & 0x1) == 0) in XMC_USIC_CH_GetBaudrate()261 divider *= ((channel->BRG & USIC_CH_BRG_PDIV_Msk) >> USIC_CH_BRG_PDIV_Pos) + 1; in XMC_USIC_CH_GetBaudrate()262 if ((((channel->BRG & USIC_CH_BRG_CTQSEL_Msk) >> USIC_CH_BRG_CTQSEL_Pos) & 0x2) != 0) in XMC_USIC_CH_GetBaudrate()270 divider *= ((channel->BRG & USIC_CH_BRG_PCTQ_Msk) >> USIC_CH_BRG_PCTQ_Pos) + 1; in XMC_USIC_CH_GetBaudrate()271 divider *= ((channel->BRG & USIC_CH_BRG_DCTQ_Msk) >> USIC_CH_BRG_DCTQ_Pos) + 1; in XMC_USIC_CH_GetBaudrate()293 divider = (channel->BRG & USIC_CH_BRG_PPPEN_Msk) ? 2 : 1; in XMC_USIC_CH_GetSCLKFrequency()[all …]
149 channel->BRG = (uint32_t)((channel->BRG & ~(USIC_CH_BRG_CTQSEL_Msk)) | in XMC_I2S_CH_SetBaudrate()177 channel->BRG = (uint32_t)((channel->BRG & ~(USIC_CH_BRG_CTQSEL_Msk)) | in XMC_I2S_CH_SetBaudrateEx()230 channel->BRG = (uint32_t)((channel->BRG & ~((uint32_t)(USIC_CH_BRG_DCTQ_Msk | in XMC_I2S_CH_SetSystemWordLength()
250 pdiv = (uint32_t)(channel->BRG & USIC_CH_BRG_PDIV_Msk) >> USIC_CH_BRG_PDIV_Pos; in XMC_SPI_CH_SetInterwordDelay()
500 __IO uint32_t BRG; /**< Baud rate generator register*/ member1033 channel->BRG = (uint32_t)(channel->BRG & (~USIC_CH_BRG_CLKSEL_Msk)) | (uint32_t)(clock_source); in XMC_USIC_CH_SetBRGInputClockSource()2069 channel->BRG |= (uint32_t)USIC_CH_BRG_TMEN_Msk; in XMC_USIC_CH_EnableTimeMeasurement()2086 channel->BRG &= (uint32_t)~USIC_CH_BRG_TMEN_Msk; in XMC_USIC_CH_DisableTimeMeasurement()2102 channel->BRG = (uint32_t)(channel->BRG & (~USIC_CH_BRG_MCLKCFG_Msk)) | (uint32_t)passive_level; in XMC_USIC_CH_SetMclkOutputPassiveLevel()2130 channel->BRG = (uint32_t)(channel->BRG & (~(USIC_CH_BRG_SCLKCFG_Msk | in XMC_USIC_CH_ConfigureShiftClockOutput()
828 channel->BRG = (channel->BRG & ~(USIC_CH_BRG_DCTQ_Msk | in XMC_SPI_CH_SetSlaveSelectDelay()
1654 …__IO uint32_t BRG; /*!< (@ 0x40030014) Baud Rate Generator Register… member
1693 …__IO uint32_t BRG; /*!< (@ 0x40030014) Baud Rate Generator Register… member
1913 …__IO uint32_t BRG; /*!< (@ 0x40030014) Baud Rate Generator Register… member
