| /hal_gigadevice-latest/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_rcu.c | 181 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
183 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
207 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
209 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_rcu.c | 299 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
301 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
336 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
338 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_rcu.c | 159 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
161 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
187 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
189 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_rcu.c | 204 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
206 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
231 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
233 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_rcu.c | 207 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
209 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
233 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
235 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_rcu.c | 201 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
203 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
233 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
235 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_rcu.c | 185 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
187 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
211 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
213 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_rcu.c | 260 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_enable() argument
262 RCU_REG_VAL(periph_reset) |= BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_enable()
292 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset) in rcu_periph_reset_disable() argument
294 RCU_REG_VAL(periph_reset) &= ~BIT(RCU_BIT_POS(periph_reset)); in rcu_periph_reset_disable()
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_rcu.h | 637 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
639 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/include/ |
| D | gd32a50x_rcu.h | 662 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
664 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_rcu.h | 716 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
718 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_rcu.h | 734 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
736 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/include/ |
| D | gd32f403_rcu.h | 791 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
793 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_rcu.h | 822 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
824 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_rcu.h | 1090 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
1092 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_rcu.h | 1337 void rcu_periph_reset_enable(rcu_periph_reset_enum periph_reset);
1339 void rcu_periph_reset_disable(rcu_periph_reset_enum periph_reset);
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