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Searched refs:RCU_SCSS_PLL (Results 1 – 15 of 15) sorted by relevance

/hal_gigadevice-latest/gd32a50x/cmsis/gd/gd32a50x/source/
Dsystem_gd32a50x.c296 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_24m_pll_irc8m()
357 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_48m_pll_irc8m()
417 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_72m_pll_irc8m()
477 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_100m_pll_irc8m()
584 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_24m_pll_hxtal()
644 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_48m_pll_hxtal()
704 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_72m_pll_hxtal()
764 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_100m_pll_hxtal()
795 case RCU_SCSS_PLL: in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/source/
Dsystem_gd32f3x0.c324 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_hxtal()
361 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_irc8m()
404 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_irc48m()
458 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_84m_hxtal()
494 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_84m_irc8m()
549 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_96m_hxtal()
586 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_96m_irc8m()
630 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_96m_irc48m()
686 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_hxtal()
723 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_irc8m()
/hal_gigadevice-latest/gd32vf103/riscv/source/
Dsystem_gd32vf103.c374 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_24m_hxtal()
445 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_36m_hxtal()
519 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_48m_hxtal()
591 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_56m_hxtal()
664 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_hxtal()
739 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_96m_hxtal()
828 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_hxtal()
884 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_48m_irc8m()
940 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_irc8m()
996 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_irc8m()
/hal_gigadevice-latest/gd32f403/cmsis/gd/gd32f403/source/
Dsystem_gd32f403.c301 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_48m_irc8m()
370 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_irc8m()
439 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_irc8m()
508 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_120m_irc8m()
577 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_168m_irc8m()
652 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_168m_irc48m()
773 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_48m_hxtal()
850 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_hxtal()
928 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_hxtal()
1006 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_120m_hxtal()
[all …]
/hal_gigadevice-latest/gd32e10x/cmsis/gd/gd32e10x/source/
Dsystem_gd32e10x.c281 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_48m_irc8m()
338 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_irc8m()
395 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_irc8m()
452 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_120m_irc8m()
567 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_48m_hxtal()
638 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_hxtal()
709 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_108m_hxtal()
781 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_120m_hxtal()
/hal_gigadevice-latest/gd32e50x/cmsis/gd/gd32e50x/source/
Dsystem_gd32e50x.c284 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_irc8m()
354 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_120m_irc8m()
424 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_168m_irc8m()
494 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_180m_irc8m()
642 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_72m_hxtal()
746 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_120m_hxtal()
851 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_168m_hxtal()
956 while(0U == (RCU_CFG0 & RCU_SCSS_PLL)){ in system_clock_180m_hxtal()
/hal_gigadevice-latest/gd32l23x/cmsis/gd/gd32l23x/source/
Dsystem_gd32l23x.c220 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_64m_hxtal()
280 while((RCU_CFG0 & RCU_CFG0_SCSS) != RCU_SCSS_PLL) { in system_clock_64m_irc16m()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_rcu.c926 case RCU_SCSS_PLL: in rcu_clock_freq_get()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_rcu.h435 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h467 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sour… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h490 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock source select P… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_rcu.h512 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_rcu.h519 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc… macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rcu.h489 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock source select … macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_rcu.h835 #define RCU_SCSS_PLL CFG0_SCSS(2) /*!< system clock sourc… macro