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Searched refs:RCU_PLLSRC_HXTAL (Results 1 – 12 of 12) sorted by relevance

/hal_gigadevice-latest/gd32f4xx/cmsis/gd/gd32f4xx/source/
Dsystem_gd32f4xx.c393 (RCU_PLLSRC_HXTAL) | (5U << 24U)); in system_clock_120m_8m_hxtal()
461 (RCU_PLLSRC_HXTAL) | (5U << 24U)); in system_clock_120m_25m_hxtal()
593 (RCU_PLLSRC_HXTAL) | (7 << 24U)); in system_clock_168m_8m_hxtal()
661 (RCU_PLLSRC_HXTAL) | (7U << 24U)); in system_clock_168m_25m_hxtal()
797 (RCU_PLLSRC_HXTAL) | (9U << 24U)); in system_clock_200m_8m_hxtal()
865 (RCU_PLLSRC_HXTAL) | (9U << 24U)); in system_clock_200m_25m_hxtal()
1001 (RCU_PLLSRC_HXTAL) | (10U << 24U)); in system_clock_240m_8m_hxtal()
1069 (RCU_PLLSRC_HXTAL) | (10U << 24U)); in system_clock_240m_25m_hxtal()
1129 if (RCU_PLLSRC_HXTAL == pllsel) { in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32vf103/riscv/source/
Dsystem_gd32vf103.c344 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL6); in system_clock_24m_hxtal()
415 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL9); in system_clock_36m_hxtal()
486 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL12); in system_clock_48m_hxtal()
560 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL14); in system_clock_56m_hxtal()
632 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL18); in system_clock_72m_hxtal()
707 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL24); in system_clock_96m_hxtal()
721 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL24); in system_clock_96m_hxtal()
781 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL27); in system_clock_108m_hxtal()
/hal_gigadevice-latest/gd32a50x/cmsis/gd/gd32a50x/source/
Dsystem_gd32a50x.c570 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL6); in system_clock_24m_pll_hxtal()
630 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL12); in system_clock_48m_pll_hxtal()
690 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL18); in system_clock_72m_pll_hxtal()
750 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL25); in system_clock_100m_pll_hxtal()
799 if(RCU_PLLSRC_HXTAL == pllsel) { in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32l23x/cmsis/gd/gd32l23x/source/
Dsystem_gd32l23x.c206 RCU_CFG0 |= (RCU_PLLSRC_HXTAL | RCU_PLL_MUL8); in system_clock_64m_hxtal()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_spi.c284 if((RCU_PLL & RCU_PLL_PLLSEL) == RCU_PLLSRC_HXTAL) { in i2s_psc_config()
Dgd32f4xx_rcu.c1287 if(RCU_PLLSRC_HXTAL == pllsel) { in rcu_clock_freq_get()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_rcu.c1032 if(RCU_PLLSRC_HXTAL == pllsel) { in rcu_clock_freq_get()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_rcu.c929 if(RCU_PLLSRC_HXTAL == pllsel) { in rcu_clock_freq_get()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_rcu.h475 #define RCU_PLLSRC_HXTAL RCU_CFG0_PLLSEL /*!< HXTAL clock select… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h540 #define RCU_PLLSRC_HXTAL RCU_CFG0_PLLSEL /*!< HXTAL is selected… macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rcu.h545 #define RCU_PLLSRC_HXTAL CFG0_PLLSRC(1) /*!< PLL clock source select HXTAL… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_rcu.h998 #define RCU_PLLSRC_HXTAL RCU_PLL_PLLSEL /*!< HXTAL clock selecte… macro