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Searched refs:RCU_CFG1_PREDV (Results 1 – 9 of 9) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/source/
Dsystem_gd32f3x0.c182 RCU_CFG1 &= ~(RCU_CFG1_PREDV | RCU_CFG1_PLLMF5 | RCU_CFG1_PLLPRESEL); in SystemInit()
308 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_hxtal()
346 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_irc8m()
388 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_irc48m()
442 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_84m_hxtal()
479 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_84m_irc8m()
532 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_96m_hxtal()
570 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_96m_irc8m()
613 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_96m_irc48m()
669 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_108m_hxtal()
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/hal_gigadevice-latest/gd32l23x/cmsis/gd/gd32l23x/source/
Dsystem_gd32l23x.c95 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in SystemInit()
203 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in system_clock_64m_hxtal()
263 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in system_clock_64m_irc16m()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_rcu.c771 prediv &= ~RCU_CFG1_PREDV; in rcu_hxtal_prediv_config()
932 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV) + 1U; in rcu_clock_freq_get()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_rcu.c64 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in rcu_deinit()
605 prediv &= ~RCU_CFG1_PREDV; in rcu_pll_source_ck_prediv_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_rcu.c69 RCU_CFG1 &= ~(RCU_CFG1_PREDV | RCU_CFG1_PLLMF5 | RCU_CFG1_PLLPRESEL); in rcu_deinit()
574 prediv &= ~RCU_CFG1_PREDV; in rcu_hxtal_prediv_config()
/hal_gigadevice-latest/gd32a50x/cmsis/gd/gd32a50x/source/
Dsystem_gd32a50x.c802 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV) + 1U; in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h233 #define RCU_CFG1_PREDV BITS(0,3) /*!< CK_HXTAL divider… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h211 #define RCU_CFG1_PREDV BITS(0,3) /*!< CK_HXTAL divider previous PLL */ macro
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rcu.h223 #define RCU_CFG1_PREDV BITS(0,3) /*!< CK_HXTAL divider previous PLL */ macro