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Searched refs:RCU_CFG1 (Results 1 – 25 of 29) sorted by relevance

12

/hal_gigadevice-latest/gd32vf103/riscv/source/
Dsystem_gd32vf103.c170 RCU_CFG1 = 0x00000000U; in SystemInit()
220 predv0sel = (RCU_CFG1 & RCU_CFG1_PREDV0SEL); in SystemCoreClockUpdate()
224 predv1 = ((RCU_CFG1 & RCU_CFG1_PREDV1) >> 4) + 1U; in SystemCoreClockUpdate()
225 pll1mf = ((RCU_CFG1 & RCU_CFG1_PLL1MF) >> 8) + 2U; in SystemCoreClockUpdate()
231 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV0) + 1U; in SystemCoreClockUpdate()
348 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CFG1_PREDV0); in system_clock_24m_hxtal()
349 RCU_CFG1 |= (RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PREDV0_DIV10); in system_clock_24m_hxtal()
358 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL | RCU_CFG1_PREDV1 | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV0); in system_clock_24m_hxtal()
359 RCU_CFG1 |= (RCU_PREDV0SRC_HXTAL | RCU_PREDV0_DIV2 ); in system_clock_24m_hxtal()
419 RCU_CFG1 &= ~(RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CFG1_PREDV0); in system_clock_36m_hxtal()
[all …]
/hal_gigadevice-latest/gd32f3x0/cmsis/gd/gd32f3x0/source/
Dsystem_gd32f3x0.c182 RCU_CFG1 &= ~(RCU_CFG1_PREDV | RCU_CFG1_PLLMF5 | RCU_CFG1_PLLPRESEL); in SystemInit()
308 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_hxtal()
310 RCU_CFG1 |= (RCU_PLLPRESEL_HXTAL); in system_clock_72m_hxtal()
311 RCU_CFG1 |= (RCU_PLL_MUL9 & RCU_CFG1_PLLMF5); in system_clock_72m_hxtal()
346 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_irc8m()
348 RCU_CFG1 |= (RCU_PLL_MUL18 & RCU_CFG1_PLLMF5); in system_clock_72m_irc8m()
388 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_72m_irc48m()
390 RCU_CFG1 |= (RCU_PLLPRESEL_IRC48M | RCU_PLL_PREDV2); in system_clock_72m_irc48m()
391 RCU_CFG1 |= (RCU_PLL_MUL3 & RCU_CFG1_PLLMF5); in system_clock_72m_irc48m()
442 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PLLMF5 | RCU_CFG1_PREDV); in system_clock_84m_hxtal()
[all …]
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_rcu.c85 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 | RCU_CFG1_PREDV1 | RCU_CFG1_PLL1MF | RCU_CFG1_PLL2MF | in rcu_deinit()
422 reg = RCU_CFG1; in rcu_pllpresel_config()
428 RCU_CFG1 = reg; in rcu_pllpresel_config()
447 reg = RCU_CFG1; in rcu_predv0_config()
453 RCU_CFG1 = reg; in rcu_predv0_config()
468 reg = RCU_CFG1; in rcu_predv1_config()
474 RCU_CFG1 = reg; in rcu_predv1_config()
487 RCU_CFG1 &= ~RCU_CFG1_PLL1MF; in rcu_pll1_config()
488 RCU_CFG1 |= pll_mul; in rcu_pll1_config()
501 RCU_CFG1 &= ~RCU_CFG1_PLL2MF; in rcu_pll2_config()
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Dgd32f403_spi.c259 if(0U != (RCU_CFG1 & clks)){ in i2s_psc_config()
261 clks = (uint32_t)((RCU_CFG1 & I2S_CLOCK_MUL_MASK) >> 12U); in i2s_psc_config()
274 i2sclock = (uint32_t)(((RCU_CFG1 & I2S_CLOCK_DIV_MASK) >> 4U) + 1U); in i2s_psc_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_rcu.c93 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 | RCU_CFG1_PREDV1 | RCU_CFG1_PLL1MF | RCU_CFG1_PLL2MF | in rcu_deinit()
425 reg = RCU_CFG1; in rcu_pllpresel_config()
431 RCU_CFG1 = reg; in rcu_pllpresel_config()
450 reg = RCU_CFG1; in rcu_predv0_config()
456 RCU_CFG1 = reg; in rcu_predv0_config()
471 reg = RCU_CFG1; in rcu_predv1_config()
477 RCU_CFG1 = reg; in rcu_predv1_config()
490 RCU_CFG1 &= ~RCU_CFG1_PLL1MF; in rcu_pll1_config()
491 RCU_CFG1 |= pll_mul; in rcu_pll1_config()
504 RCU_CFG1 &= ~RCU_CFG1_PLL2MF; in rcu_pll2_config()
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Dgd32e10x_spi.c264 if(0U != (RCU_CFG1 & clks)){ in i2s_psc_config()
266 clks = (uint32_t)((RCU_CFG1 & I2S_CLOCK_MUL_MASK) >> RCU_CFG1_PLL2MF_OFFSET); in i2s_psc_config()
279 i2sclock = (uint32_t)(((RCU_CFG1 & I2S_CLOCK_DIV_MASK) >> RCU_CFG1_PREDV1_OFFSET) + 1U); in i2s_psc_config()
281 if(0U != (RCU_CFG1_PLLPRESEL & RCU_CFG1)){ in i2s_psc_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_rcu.c100 RCU_CFG1 &= ~(RCU_CFG1_ADCPSC_3 | RCU_CFG1_PLLPRESEL); in rcu_deinit()
108 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 | RCU_CFG1_PREDV1 | RCU_CFG1_PLL1MF | RCU_CFG1_PLL2MF | in rcu_deinit()
117 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 | RCU_CFG1_PREDV1 | RCU_CFG1_PLL1MF | RCU_CFG1_PLL2MF | in rcu_deinit()
486 reg = RCU_CFG1; in rcu_pllpresel_config()
492 RCU_CFG1 = reg; in rcu_pllpresel_config()
534 reg = RCU_CFG1; in rcu_predv0_config()
540 RCU_CFG1 = reg; in rcu_predv0_config()
555 reg = RCU_CFG1; in rcu_predv1_config()
561 RCU_CFG1 = reg; in rcu_predv1_config()
574 RCU_CFG1 &= ~RCU_CFG1_PLL1MF; in rcu_pll1_config()
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Dgd32e50x_spi.c258 if(0U != (RCU_CFG1 & clks)){ in i2s_psc_config()
260 clks = (uint32_t)((RCU_CFG1 & I2S_CLOCK_MUL_MASK) >> 12U); in i2s_psc_config()
262 pll2mf_4 = RCU_CFG1 & RCU_CFG1_PLL2MF_4; in i2s_psc_config()
287 i2sclock = (uint32_t)(((RCU_CFG1 & I2S_CLOCK_DIV_MASK) >> 4U) + 1U); in i2s_psc_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_rcu.c68 RCU_CFG1 &= ~(RCU_CFG1_PREDV0 | RCU_CFG1_PREDV1 | RCU_CFG1_PLL1MF | RCU_CFG1_PLL2MF | in rcu_deinit()
401 reg = RCU_CFG1; in rcu_predv0_config()
407 RCU_CFG1 = reg; in rcu_predv0_config()
422 reg = RCU_CFG1; in rcu_predv1_config()
428 RCU_CFG1 = reg; in rcu_predv1_config()
441 RCU_CFG1 &= ~RCU_CFG1_PLL1MF; in rcu_pll1_config()
442 RCU_CFG1 |= pll_mul; in rcu_pll1_config()
455 RCU_CFG1 &= ~RCU_CFG1_PLL2MF; in rcu_pll2_config()
456 RCU_CFG1 |= pll_mul; in rcu_pll2_config()
559 reg = RCU_CFG1; in rcu_i2s1_clock_config()
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Dgd32vf103_spi.c252 if(0U != (RCU_CFG1 & clks)){ in i2s_psc_config()
254 clks = (uint32_t)((RCU_CFG1 & I2S_CLOCK_MUL_MASK) >> RCU_CFG1_PLL2MF_OFFSET); in i2s_psc_config()
267 i2sclock = (uint32_t)(((RCU_CFG1 & I2S_CLOCK_DIV_MASK) >> RCU_CFG1_PREDV1_OFFSET) + 1U); in i2s_psc_config()
/hal_gigadevice-latest/gd32e10x/cmsis/gd/gd32e10x/source/
Dsystem_gd32e10x.c140 RCU_CFG1 = 0x00000000U; in SystemInit()
540 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_48m_hxtal()
543 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL10 | RCU_PREDV1_DIV2 | RCU_P… in system_clock_48m_hxtal()
546 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_48m_hxtal()
611 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_72m_hxtal()
614 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL10 | RCU_PREDV1_DIV2 | RCU_P… in system_clock_72m_hxtal()
617 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_72m_hxtal()
683 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_108m_hxtal()
686 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL10 | RCU_PREDV1_DIV2 | RCU_P… in system_clock_108m_hxtal()
689 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_108m_hxtal()
[all …]
/hal_gigadevice-latest/gd32e50x/cmsis/gd/gd32e50x/source/
Dsystem_gd32e50x.c133 RCU_CFG1 = 0x00000000U; in SystemInit()
595 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_72m_hxtal()
596 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_72m_hxtal()
610 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_72m_hxtal()
611 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV2 | RCU_PR… in system_clock_72m_hxtal()
699 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_120m_hxtal()
700 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_120m_hxtal()
714 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_120m_hxtal()
715 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV2 | RCU_PR… in system_clock_120m_hxtal()
804 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_168m_hxtal()
[all …]
/hal_gigadevice-latest/gd32f403/cmsis/gd/gd32f403/source/
Dsystem_gd32f403.c138 RCU_CFG1 = 0x00000000U; in SystemInit()
622 RCU_CFG1 |= RCU_CFG1_PLLPRESEL; in system_clock_168m_irc48m()
626 RCU_CFG1 |= RCU_PREDV0_DIV6; in system_clock_168m_irc48m()
742 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_48m_hxtal()
743 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_48m_hxtal()
819 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_72m_hxtal()
820 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_72m_hxtal()
897 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_108m_hxtal()
898 …RCU_CFG1 |= (RCU_PLLPRESRC_HXTAL | RCU_PREDV0SRC_CKPLL1 | RCU_PLL1_MUL8 | RCU_PREDV1_DIV5 | RCU_PR… in system_clock_108m_hxtal()
975 …RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL | RCU_CFG1_PREDV0SEL | RCU_CFG1_PLL1MF | RCU_CFG1_PREDV1 | RCU_CF… in system_clock_120m_hxtal()
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/hal_gigadevice-latest/gd32l23x/cmsis/gd/gd32l23x/source/
Dsystem_gd32l23x.c95 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in SystemInit()
203 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in system_clock_64m_hxtal()
263 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in system_clock_64m_irc16m()
351 prediv = (GET_BITS(RCU_CFG1, 0, 3) + 1U); in SystemCoreClockUpdate()
354 prediv = (GET_BITS(RCU_CFG1, 0, 3) + 1U); in SystemCoreClockUpdate()
357 prediv = (GET_BITS(RCU_CFG1, 0, 3) + 1U); in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_rcu.c69 RCU_CFG1 &= ~(RCU_CFG1_PREDV | RCU_CFG1_PLLMF5 | RCU_CFG1_PLLPRESEL); in rcu_deinit()
466 RCU_CFG1 &= ~(RCU_CFG1_PLLPRESEL); in rcu_pll_preselection_config()
467 RCU_CFG1 |= pll_presel; in rcu_pll_preselection_config()
485 RCU_CFG1 &= ~(RCU_CFG1_PLLMF5); in rcu_pll_config()
487 RCU_CFG1 |= (pll_mul & RCU_CFG1_PLLMF5); in rcu_pll_config()
572 prediv = RCU_CFG1; in rcu_hxtal_prediv_config()
575 RCU_CFG1 = (prediv | hxtal_prediv); in rcu_hxtal_prediv_config()
1068 pllmf5 = GET_BITS(RCU_CFG1, 31, 31); in rcu_clock_freq_get()
1086 pllpresel = GET_BITS(RCU_CFG1, 30, 30); in rcu_clock_freq_get()
1088 prediv = (GET_BITS(RCU_CFG1,0, 3) + 1U); in rcu_clock_freq_get()
/hal_gigadevice-latest/gd32a50x/cmsis/gd/gd32a50x/source/
Dsystem_gd32a50x.c120 RCU_CFG1 = 0x00000000U; in SystemInit()
568 RCU_CFG1 |= RCU_PREDV_DIV2; in system_clock_24m_pll_hxtal()
628 RCU_CFG1 |= RCU_PREDV_DIV2; in system_clock_48m_pll_hxtal()
688 RCU_CFG1 |= RCU_PREDV_DIV2; in system_clock_72m_pll_hxtal()
748 RCU_CFG1 |= RCU_PREDV_DIV2; in system_clock_100m_pll_hxtal()
802 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV) + 1U; in SystemCoreClockUpdate()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_rcu.c64 RCU_CFG1 &= ~(RCU_CFG1_PREDV); in rcu_deinit()
603 prediv = RCU_CFG1; in rcu_pll_source_ck_prediv_config()
606 RCU_CFG1 = (prediv | pllsource_ck_prediv); in rcu_pll_source_ck_prediv_config()
1119 prediv = (GET_BITS(RCU_CFG1, 0, 3) + 1U); in rcu_clock_freq_get()
1122 prediv = (GET_BITS(RCU_CFG1, 0, 3) + 1U); in rcu_clock_freq_get()
1125 prediv = (GET_BITS(RCU_CFG1, 0, 3) + 1U); in rcu_clock_freq_get()
Dgd32l23x_spi.c304 if(0U != (RCU_CFG1 & clks)) { in i2s_psc_config()
306 clks = (uint32_t)((RCU_CFG1 & I2S_CLOCK_MUL_MASK) >> 12U); in i2s_psc_config()
319 i2sclock = (uint32_t)(((RCU_CFG1 & I2S_CLOCK_DIV_MASK) >> 4U) + 1U); in i2s_psc_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_rcu.c82 RCU_CFG1 &= ~(RCU_CFG1_PLLSAIRDIV | RCU_CFG1_TIMERSEL); in rcu_deinit()
717 RCU_CFG1 &= timer_clock_prescaler; in rcu_timer_clock_prescaler_config()
719 RCU_CFG1 |= timer_clock_prescaler; in rcu_timer_clock_prescaler_config()
735 reg = RCU_CFG1; in rcu_tli_clock_div_config()
738 RCU_CFG1 = (reg | pllsai_r_div); in rcu_tli_clock_div_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_rcu.c70 RCU_CFG1 = 0x00000000U; in rcu_deinit()
769 prediv = RCU_CFG1; in rcu_hxtal_prediv_config()
772 RCU_CFG1 = (prediv | hxtal_prediv); in rcu_hxtal_prediv_config()
932 predv0 = (RCU_CFG1 & RCU_CFG1_PREDV) + 1U; in rcu_clock_freq_get()
Dgd32a50x_spi.c253 if(0U != (RCU_CFG1 & clks)){ in i2s_psc_config()
255 clks = (uint32_t)((RCU_CFG1 & I2S_CLOCK_MUL_MASK) >> 12U); in i2s_psc_config()
268 i2sclock = (uint32_t)(((RCU_CFG1 & I2S_CLOCK_DIV_MASK) >> 4U) + 1U); in i2s_psc_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_rcu.h58 #define RCU_CFG1 REG32(RCU + 0x0000002CU) /*!< clock configuration re… macro
79 #define RCU_CFG1 REG32(RCU + 0x0000002CU) /*!< clock configuration re… macro
100 #define RCU_CFG1 REG32(RCU + 0x0000002CU) /*!< clock configuration re… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_rcu.h57 #define RCU_CFG1 REG32(RCU + 0x2CU) /*!< clock configuration register… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_rcu.h55 #define RCU_CFG1 REG32(RCU + 0x0000002CU) /*!< clock configurat… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_rcu.h57 #define RCU_CFG1 REG32(RCU + 0x0000002CU) /*!< configuration register 1 */ macro

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